Mario Barbareschi

Publication Activity (10 Years)

Years Active: 2013-2024
Publications (10 Years): 64

Top Topics

Multiple Classifier Systems

Mutual Authentication

Integrated Circuit

Top Venues

Future Gener. Comput. Syst.

Publications

Mario Barbareschi, Salvatore Barone, Nicola Mazzocca, Alberto Moriconi
FPGA approximate logic synthesis through catalog-based AIG-rewriting technique. J. Syst. Archit. 150 (2024)
Mario Barbareschi, Franco Cirillo, Christian Esposito
SRAM-PUF Authentication Schemes Empowered with Blockchain on Resource-Constrained Microcontrollers. ISORC (2024)
Mario Barbareschi, Biagio Boi, Franco Cirillo, Marco De Santis, Christian Esposito
Securing the Internet of Medical Things using PUF-based SSI Authentication. ITASEC (2024)
Daniele Lombardi, Mario Barbareschi, Salvatore Barone, Valentina Casola
A comprehensive evaluation of interrupt measurement techniques for predictability in safety-critical systems. ARES (2024)
Mario Barbareschi, Valentina Casola, Antonio Emmanuele, Daniele Lombardi
On the adoption of PUF for key agreement scheme in Internet of Things. CF (Companion) (2024)
Alberto Bosio, Mario Barbareschi, Alessandro Savino, Jie Han, Jürgen Teich
Special Issue on Approximate Computing: Challenges, Methodologies, Algorithms, and Architectures for Dependable and Secure Systems. IEEE Des. Test 40 (3) (2023)
Giovanni Mezzina, Arturo Amendola, Mario Barbareschi, Salvatore De Simone, Grazia Mascellaro, Alberto Moriconi, Cataldo Luciano Saragaglia, Diana Serra, Daniela De Venuto
A Step Toward Safe Unattended Train Operations: A Pioneer Vital Control Module. DATE (2023)
Mario Barbareschi, Valentina Casola, Daniele Lombardi
Ensuring End-to-End Security in Computing Continuum Exploiting Physical Unclonable Functions. CloudCom (2023)
Mario Barbareschi, Salvatore Barone, Valentina Casola, Salvatore Della Torca, Daniele Lombardi
Automatic Test Generation to Improve Scrum for Safety Agile Methodology. ARES (2023)
Mohammad Hasan Ahmadilivani, Mario Barbareschi, Salvatore Barone, Alberto Bosio, Masoud Daneshtalab, Salvatore Della Torca, Gabriele Gavarini, Maksim Jenihhin, Jaan Raik, Annachiara Ruospo, Ernesto Sánchez, Mahdi Taheri
Special Session: Approximation and Fault Resiliency of DNN Accelerators. VTS (2023)
Mario Barbareschi, Valentina Casola, Daniele Lombardi
Lightweight Secure Keys Management Based on Physical Unclonable Functions. IWASI (2023)
Ali Piri, Salvatore Pappalardo, Salvatore Barone, Mario Barbareschi, Bastien Deveautour, Marcello Traiola, Ian O'Connor, Alberto Bosio
Input-aware accuracy characterization for approximate circuits. DSN-W (2023)
Mario Barbareschi, Salvatore Barone, Nicola Mazzocca, Alberto Moriconi
A Catalog-Based AIG-Rewriting Approach to the Design of Approximate Components. IEEE Trans. Emerg. Top. Comput. 11 (1) (2023)
Mohammad Hasan Ahmadilivani, Mario Barbareschi, Salvatore Barone, Alberto Bosio, Masoud Daneshtalab, Salvatore Della Torca, Gabriele Gavarini, Maksim Jenihhin, Jaan Raik, Annachiara Ruospo, Ernesto Sánchez, Mahdi Taheri
Special Session: Approximation and Fault Resiliency of DNN Accelerators. CoRR (2023)
Arturo Amendola, Mario Barbareschi, Salvatore De Simone, Giovanni Mezzina, Alberto Moriconi, Cataldo Luciano Saragaglia, Diana Serra, Daniela De Venuto
A real-time vital control module to increase capabilities of railway control systems in highly automated train operations. Real Time Syst. 59 (4) (2023)
Mario Barbareschi, Alberto Bosio, Ian O'Connor, Petr Fiser, Marcello Traiola
A Design Space Exploration Framework for Memristor-Based Crossbar Architecture. DDECS (2022)
Mario Barbareschi, Salvatore Barone, Valentina Casola, Pasquale Montone, Alberto Moriconi
A Memory Protection Strategy for Resource Constrained Devices in Safety Critical Applications. ICSRS (2022)
Ali Piri, Sepide Saeedi, Mario Barbareschi, Bastien Deveautour, Stefano Di Carlo, Ian O'Connor, Alessandro Savino, Marcello Traiola, Alberto Bosio
Input-Aware Approximate Computing. AQTR (2022)
Mario Barbareschi, Salvatore Barone, Alberto Bosio, Jie Han, Marcello Traiola
A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators. ACM J. Emerg. Technol. Comput. Syst. 18 (3) (2022)
Giovanni Mezzina, Cataldo L. Saragaglia, Mario Barbareschi, Diana Serra, Salvatore De Simone, Alberto Moriconi, Daniela De Venuto
Model-Based Vital Control Architecture for Highly Automated Train Operations. ApplePies (2022)
Mario Barbareschi, Salvatore Barone, Riccardo Carbone, Valentina Casola
Scrum for safety: an agile methodology for safety-critical software systems. Softw. Qual. J. 30 (4) (2022)
Mario Barbareschi, Salvatore Barone, Nicola Mazzocca
Advancing synthesis of decision tree-based multiple classifier systems: an approximate computing case study. Knowl. Inf. Syst. 63 (6) (2021)
Mario Barbareschi, Valentina Casola, Alessandra De Benedictis, Erasmo La Montagna, Nicola Mazzocca
On the Adoption of Physically Unclonable Functions to Secure IIoT Devices. IEEE Trans. Ind. Informatics 17 (11) (2021)
Salvatore Barone, Marcello Traiola, Mario Barbareschi, Alberto Bosio
Multi-Objective Application-Driven Approximate Design Method. IEEE Access 9 (2021)
Riccardo Carbone, Salvatore Barone, Mario Barbareschi, Valentina Casola
Scrum for Safety: Agile Development in Safety-Critical Software Systems. QUATIC (2021)
Mario Barbareschi, Salvatore Barone, Alfonso Fezza, Erasmo La Montagna
Enforcing Mutual Authentication and Confidentiality in Wireless Sensor Networks Using Physically Unclonable Functions: A Case Study. QUATIC (2021)
Duccio Bertieri, Andrea Ceccarelli, Tommaso Zoppi, Innocenzo Mungiello, Mario Barbareschi, Andrea Bondavalli
Development and validation of a safe communication protocol compliant to railway standards. J. Braz. Comput. Soc. 27 (1) (2021)
Mario Barbareschi, Alberto Bosio, Lukás Sekanina, Claus Braun
Editorial: Special issue on Advancing on Approximate Computing: Methodologies, Architectures and Algorithms. Future Gener. Comput. Syst. 124 (2021)
Giovanni Mezzina, Mario Barbareschi, Salavatore De Simone, Alessandro Di Benedetto, G. Narracci, C. L. Saragaglia, D. Serra, Daniela De Venuto
Smart On-Board Surveillance Module for Safe Autonomous Train Operations. ApplePies (2021)
Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
Maximizing Yield for Approximate Integrated Circuits. DATE (2020)
Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
A Survey of Testing Techniques for Approximate Integrated Circuits. Proc. IEEE 108 (12) (2020)
Mario Barbareschi, Alessandra De Benedictis, Erasmo La Montagna, Antonino Mazzeo, Nicola Mazzocca
PUF-Enabled Authentication-as-a-Service in Fog-IoT Systems. WETICE (2019)
Mario Barbareschi, Alessandra De Benedictis, Erasmo La Montagna, Antonino Mazzeo, Nicola Mazzocca
A PUF-based mutual authentication scheme for Cloud-Edges IoT systems. Future Gener. Comput. Syst. 101 (2019)
Alberto Bosio, Mario Barbareschi
Special Issue on Design, Technology, and Test of Integrated Circuits and Systems. J. Circuits Syst. Comput. 28 (Supplement-1) (2019)
Duccio Bertieri, Tommaso Zoppi, Innocenzo Mungiello, Andrea Ceccarelli, Mario Barbareschi, Andrea Bondavalli
Practical Experience Report: Implementation, Verification and Validation of a Safe and Secure Communication Protocol for the Railway Domain. LADC (2019)
Mario Barbareschi, Salvatore Barone, Antonino Mazzeo, Nicola Mazzocca
Efficient Reed-Muller Implementation for Fuzzy Extractor Schemes. DTIS (2019)
Marcello Traiola, Mario Barbareschi, Alberto Bosio
Estimating dynamic power consumption for memristor-based CiM architecture. Microelectron. Reliab. 80 (2018)
Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
Testing approximate digital circuits: Challenges and opportunities. LATS (2018)
Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
Investigation of Mean-Error Metrics for Testing Approximate Integrated Circuits. DFT (2018)
Mario Barbareschi, Alessandra De Benedictis, Nicola Mazzocca
A PUF-based hardware mutual authentication protocol. J. Parallel Distributed Comput. 119 (2018)
Mario Barbareschi, Giorgio Di Natale, Lionel Torres, Antonino Mazzeo
A Ring Oscillator-Based Identification Mechanism Immune to Aging and External Working Conditions. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2018)
Marcello Traiola, Alessandro Savino, Mario Barbareschi, Stefano Di Carlo, Alberto Bosio
Predicting the Impact of Functional Approximation: from Component- to Application-Level. IOLTS (2018)
Umberto Ferrandino, Marcello Traiola, Mario Barbareschi, Antonino Mazzeo, Petr Fiser, Alberto Bosio
Synthesis of Finite State Machines on Memristor Crossbars. DDECS (2018)
Domenico Amelino, Mario Barbareschi, Alessandro Cilardo
An IP Core Remote Anonymous Activation Protocol. IEEE Trans. Emerg. Top. Comput. 6 (2) (2018)
Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
On the Comparison of Different ATPG Approaches for Approximate Integrated Circuits. DDECS (2018)
Imran Wali, Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
Towards approximation during test of Integrated Circuits. DDECS (2017)
Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
Towards digital circuit approximation by exploiting fault simulation. EWDTS (2017)
Domenico Amelino, Mario Barbareschi, Alessandro Cilardo
A Proposal for the Secure Activation and Licensing of FPGA IP Cores. ITASEC (2017)
Alberto Bosio, Arnaud Virazel, Patrick Girard, Mario Barbareschi
Approximate computing: Design & test for integrated circuits. LATS (2017)
Mario Barbareschi, Pierpaolo Bagnasco, Domenico Amelino, Antonino Mazzeo
Designing an SRAM PUF-based secret extractor for resource-constrained devices. Int. J. Embed. Syst. 9 (4) (2017)
Mario Barbareschi, Alberto Bosio, Hoang Anh Du Nguyen, Said Hamdioui, Marcello Traiola, Elena Ioana Vatajelu
Memristive devices: Technology, design automation and computing frontiers. DTIS (2017)
Marcello Traiola, Mario Barbareschi, Alberto Bosio
Formal Design Space Exploration for memristor-based crossbar architecture. DDECS (2017)
Mario Barbareschi, Pierpaolo Bagnasco
Implementation of a reliable mechanism for protecting IP cores on low-end FPGA devices. Int. J. Embed. Syst. 9 (4) (2017)
Mario Barbareschi, Antonino Mazzeo, Salvatore Miranda
Adopting Decision Tree Based Policy Enforcement Mechanism to Protect Reconfigurable Devices. IIMSS (2016)
Mario Barbareschi, Federico Iannucci, Antonino Mazzeo
A Pruning Technique for B&B Based Design Exploration of Approximate Computing Variants. ISVLSI (2016)
Domenico Amelino, Mario Barbareschi, Ermanno Battista, Antonino Mazzeo
How to Manage Keys and Reconfiguration in WSNs Exploiting SRAM Based PUFs. IIMSS (2016)
Mario Barbareschi, Alessandro Cilardo, Antonino Mazzeo
Partial FPGA bitstream encryption enabling hardware DRM in mobile environments. Conf. Computing Frontiers (2016)
Marcello Traiola, Mario Barbareschi, Antonino Mazzeo, Alberto Bosio
XbarGen: A memristor based boolean logic synthesis tool. VLSI-SoC (2016)
Mario Barbareschi, Giorgio Di Natale, Lionel Torres
Ring oscillators analysis for security purposes in Spartan-6 FPGAs. Microprocess. Microsystems 47 (2016)
Mario Barbareschi
Implementing Hardware Decision Tree Prediction: A Scalable Approach. AINA Workshops (2016)
Domenico Amelino, Mario Barbareschi, Antonino Mazzeo
Chain-of-Trust for Microcontrollers using SRAM PUFs: the Linux Case Study. 3PGCIC (2016)
Elena Ioana Vatajelu, Giorgio Di Natale, Mario Barbareschi, Lionel Torres, Marco Indaco, Paolo Prinetto
STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability. ACM J. Emerg. Technol. Comput. Syst. 13 (1) (2016)
Mario Barbareschi, Federico Iannucci, Antonino Mazzeo
An extendible design exploration tool for supporting approximate computing techniques. DTIS (2016)
Mario Barbareschi, Federico Iannucci, Antonino Mazzeo
Automatic Design Space Exploration of Approximate Algorithms for Big Data Applications. AINA Workshops (2016)
Mario Barbareschi, Salvatore Del Prete, Francesco Gargiulo, Antonino Mazzeo, Carlo Sansone
Decision Tree-Based Multiple Classifier Systems: An FPGA Perspective. MCS (2015)
Mario Barbareschi, Antonino Mazzeo, Antonino Vespoli
Malicious traffic analysis on mobile devices: a hardware solution. Int. J. Big Data Intell. 2 (2) (2015)
Mario Barbareschi, Pierpaolo Bagnasco, Antonino Mazzeo
Authenticating IoT Devices with Physically Unclonable Functions Models. 3PGCIC (2015)
Mario Barbareschi, Sara Romano, Antonino Mazzeo
A Cloud Based Architecture for Massive Sensor Data Analysis in Health Monitoring Systems. 3PGCIC (2015)
Mario Barbareschi, Ermanno Battista, Antonino Mazzeo, Nicola Mazzocca
Testing 90 nm microcontroller SRAM PUF quality. DTIS (2015)
Mario Barbareschi, Pierpaolo Bagnasco, Antonino Mazzeo
Supply voltage variation impact on Anderson PUF quality. DTIS (2015)
Jérôme Rampon, Renaud Perillat, Lionel Torres, Pascal Benoit, Giorgio Di Natale, Mario Barbareschi
Digital Right Management for IP Protection. ISVLSI (2015)
Mario Barbareschi, Alessandra De Benedictis, Antonino Mazzeo, Antonino Vespoli
Mobile Traffic Analysis Exploiting a Cloud Infrastructure and Hardware Accelerators. 3PGCIC (2014)
Mario Barbareschi, Ermanno Battista, Antonino Mazzeo, Sridhar Venkatesan
Advancing WSN physical security adopting TPM-based architectures. IRI (2014)
Mario Barbareschi, Ermanno Battista, Nicola Mazzocca, Sridhar Venkatesan
A hardware accelerator for data classification within the sensing infrastructure. IRI (2014)
Alessandro Cilardo, Mario Barbareschi, Antonino Mazzeo
Secure distribution infrastructure for hardware digital contents. IET Comput. Digit. Tech. 8 (6) (2014)
Flora Amato, Mario Barbareschi, Valentina Casola, Antonino Mazzeo, Sara Romano
Towards Automatic Generation of Hardware Classifiers. ICA3PP (2) (2013)
Mario Barbareschi, Ermanno Battista, Valentina Casola, Antonino Mazzeo, Nicola Mazzocca
On the Adoption of FPGA for Protecting Cyber Physical Infrastructures. 3PGCIC (2013)
Flora Amato, Mario Barbareschi, Valentina Casola, Antonino Mazzeo
An FPGA-Based Smart Classifier for Decision Support Systems. IDC (2013)
Mario Barbareschi, Antonino Mazzeo, Antonino Vespoli
Network Traffic Analysis Using Android on a Hybrid Computing Architecture. ICA3PP (2) (2013)