A Proposal for the Secure Activation and Licensing of FPGA IP Cores.
Domenico AmelinoMario BarbareschiAlessandro CilardoPublished in: ITASEC (2017)
Keyphrases
- hardware implementation
- high speed
- field programmable gate array
- signal processing
- real time image processing
- key management
- real time
- information processing
- security analysis
- authentication protocol
- verilog hdl
- general purpose processors
- multi core processors
- ip networks
- lightweight
- hardware design
- single chip
- security protocols
- internet protocol
- activation patterns
- level parallelism
- security issues