Implementation of a reliable mechanism for protecting IP cores on low-end FPGA devices.
Mario BarbareschiPierpaolo BagnascoPublished in: Int. J. Embed. Syst. (2017)
Keyphrases
- low end
- high end
- hardware implementation
- fpga technology
- hardware design
- reconfigurable hardware
- real time
- low cost
- hardware architecture
- low bit rate
- general purpose processors
- field programmable gate array
- efficient implementation
- parallel processing
- computer systems
- software development
- high speed
- wireless sensor networks