A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems.
D. A. TranArnaud VirazelAlberto BosioLuigi DililloPatrick GirardSerge PravossoudovitchHans-Joachim WunderlichPublished in: J. Electron. Test. (2014)
Keyphrases
- fault tolerant
- distributed systems
- fault tolerance
- safety critical
- analog vlsi
- high speed
- circuit design
- management system
- load balancing
- high assurance
- complex systems
- power consumption
- intelligent systems
- message passing
- cmos technology
- interconnection networks
- state machine
- delay insensitive
- intelligent agents
- computer systems
- low power
- low cost
- mixed signal
- digital libraries
- vlsi circuits
- data streams