Matthias Sauer

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 31

Top Venues

ETS

DATE

VTS

ATS

University of Freiburg, Freiburg im Breisgau, Germany (PHD)

Education History

University of Freiburg, Freiburg im Breisgau, Germany

PHD

Publications

Denis Schwachhofer, Peter Domanski, Steffen Becker, Stefan Wagner, Matthias Sauer, Dirk Pflüger, Ilia Polian
Large Language Models to Generate System-Level Test Programs Targeting Non-functional Properties. CoRR (2024)
Nourhan Elhamawy, Jens Anders, Ilia Polian, Matthias Sauer
Scenario-based Test Content Optimization: Scan Test vs. System-Level Test. VTS (2024)
Denis Schwachhofer, Francesco Angione, Steffen Becker, Stefan Wagner, Matthias Sauer, Paolo Bernardi, Ilia Polian
Optimizing System-Level Test Program Generation via Genetic Programming. ETS (2024)
Denis Schwachhofer, Peter Domanski, Steffen Becker, Stefan Wagner, Matthias Sauer, Dirk Pflüger, Ilia Polian
Training Large Language Models for System-Level Test Program Generation Targeting Non-functional Properties. ETS (2024)
Denis Schwachhofer, Maik Betka, Steffen Becker, Stefan Wagner, Matthias Sauer, Ilia Polian
Automating Greybox System-Level Test Generation. ETS (2023)
Hussam Amrouch, Krishnendu Chakrabarty, Dirk Pflüger, Ilia Polian, Matthias Sauer, Matteo Sonza Reorda
Machine Learning for Test, Diagnosis, Post-Silicon Validation and Yield Optimization. ETS (2022)
Hussam Amrouch, Jens Anders, Steffen Becker, Maik Betka, Gerd Bleher, Peter Domanski, Nourhan Elhamawy, Thomas Ertl, Athanasios Gatzastras, Paul R. Genssler, Sebastian Hasler, Martin Heinrich, André van Hoorn, Hanieh Jafarzadeh, Ingmar Kallfass, Florian Klemme, Steffen Koch, Ralf Küsters, Andrés Lalama, Raphael Latty, Yiwen Liao, Natalia Lylina, Zahra Paria Najafi-Haghi, Dirk Pflüger, Ilia Polian, Jochen Rivoir, Matthias Sauer, Denis Schwachhofer, Steffen Templin, Christian Volmer, Stefan Wagner, Daniel Weiskopf, Hans-Joachim Wunderlich, Bin Yang, Martin Zimmermann
Intelligent Methods for Test and Reliability. DATE (2022)
Davide Appello, H. H. Chen, Matthias Sauer, Ilia Polian, Paolo Bernardi, Matteo Sonza Reorda
System-Level Test: State of the Art and Challenges. IOLTS (2021)
Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Matthias Sauer, Bernd Becker, Matteo Sonza Reorda
New Techniques for the Automatic Identification of Uncontrollable Lines in a CPU Core. VTS (2021)
Jaume Abella, Sergi Alcaide, Jens Anders, Francisco Bas, Steffen Becker, Elke De Mulder, Nourhan Elhamawy, Frank K. Gürkaynak, Helena Handschuh, Carles Hernández, Mike Hutter, Leonidas Kosmidis, Ilia Polian, Matthias Sauer, Stefan Wagner, Francesco Regazzoni
Security, Reliability and Test Aspects of the RISC-V Ecosystem. ETS (2021)
Ilia Polian, Jens Anders, Steffen Becker, Paolo Bernardi, Krishnendu Chakrabarty, Nourhan Elhamawy, Matthias Sauer, Adit D. Singh, Matteo Sonza Reorda, Stefan Wagner
Exploring the Mysteries of System-Level Test. CoRR (2021)
Ilia Polian, Jens Anders, Steffen Becker, Paolo Bernardi, Krishnendu Chakrabarty, Nourhan Elhamawy, Matthias Sauer, Adit D. Singh, Matteo Sonza Reorda, Stefan Wagner
Exploring the Mysteries of System-Level Test. ATS (2020)
Benjamin Thiemann, Linus Feiten, Pascal Raiola, Bernd Becker, Matthias Sauer
On Integrating Lightweight Encryption in Reconfigurable Scan Networks. ETS (2019)
Natalia Lylina, Ahmed Atteya, Pascal Raiola, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich
Security Compliance Analysis of Reconfigurable Scan Networks. ITC (2019)
Pascal Raiola, Benjamin Thiemann, Jan Burchard, Ahmed Atteya, Natalia Lylina, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer
On Secure Data Flow in Reconfigurable Scan Networks. DATE (2019)
Pascal Raiola, Michael A. Kochte, Ahmed Atteya, Laura Rodríguez Gómez, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer
Detecting and Resolving Security Violations in Reconfigurable Scan Networks. IOLTS (2018)
Felix Neubauer, Jan Burchard, Pascal Raiola, Jochen Rivoir, Bernd Becker, Matthias Sauer
Efficient generation of parametric test conditions for AMS chips with an interval constraint solver. VTS (2018)
Ahmed Atteya, Michael A. Kochte, Matthias Sauer, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich
Online prevention of security violations in reconfigurable scan networks. ETS (2018)
Johanna Sepúlveda, Damian Aboul-Hassan, Georg Sigl, Bernd Becker, Matthias Sauer
Towards the formal verification of security properties of a Network-on-Chip router. ETS (2018)
Matthias Sauer, Pascal Raiola, Linus Feiten, Bernd Becker, Ulrich Rührmair, Ilia Polian
Sensitized path PUF: A lightweight embedded physical unclonable function. DATE (2017)
Michael A. Kochte, Matthias Sauer, Laura Rodríguez Gómez, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich
Specification and verification of security in reconfigurable scan networks. ETS (2017)
Andreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker
Effective generation and evaluation of diagnostic SBST programs. VTS (2016)
Linus Feiten, Matthias Sauer
Extracting the RC4 secret key of the Open Smart Grid Protocol. IACR Cryptol. ePrint Arch. 2016 (2016)
Linus Feiten, Jonathan Oesterle, Tobias Martin, Matthias Sauer, Bernd Becker
Systemic Frequency Biases in Ring Oscillator PUFs on FPGAs. IEEE Trans. Multi Scale Comput. Syst. 2 (3) (2016)
Dominik Erb, Karsten Scheibler, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker
Mixed 01X-RSL-Encoding for fast and accurate ATPG with unknowns. ASP-DAC (2016)
Andreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker
A Flexible Framework for the Automatic Generation of SBST Programs. IEEE Trans. Very Large Scale Integr. Syst. 24 (10) (2016)
Linus Feiten, Matthias Sauer, Bernd Becker
On Metrics to Quantify the Inter-Device Uniqueness of PUFs. IACR Cryptol. ePrint Arch. 2016 (2016)
Matthias Sauer, Jie Jiang, Sven Reimer, Kohei Miyase, Xiaoqing Wen, Bernd Becker, Ilia Polian
On Optimal Power-Aware Path Sensitization. ATS (2016)
Michael A. Kochte, Rafal Baranowski, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich
Formal verification of secure reconfigurable scan network infrastructure. ETS (2016)
Matthias Sauer, Bernd Becker, Ilia Polian
PHAETON: A SAT-Based Framework for Timing-Aware Path Sensitization. IEEE Trans. Computers 65 (6) (2016)
Mathias Soeken, Pascal Raiola, Baruch Sterin, Bernd Becker, Giovanni De Micheli, Matthias Sauer
SAT-Based Combinational and Sequential Dependency Computation. Haifa Verification Conference (2016)
Bernd Becker, Matthias Sauer, Christoph Scholl, Ralf Wimmer
Modeling Unknown Values in Test and Verification. SyDe Summer School (2015)
Karina Gitina, Ralf Wimmer, Sven Reimer, Matthias Sauer, Christoph Scholl, Bernd Becker
Solving DQBF through quantifier elimination. DATE (2015)
Linus Feiten, Matthias Sauer, Tobias Schubert, Victor Tomashevich, Ilia Polian, Bernd Becker
Formal Vulnerability Analysis of Security Components. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (8) (2015)
Andreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker
On the automatic generation of SBST test programs for in-field test. DATE (2015)
Kohei Miyase, Matthias Sauer, Bernd Becker, Xiaoqing Wen, Seiji Kajihara
Identification of high power consuming areas with gate type and logic level information. ETS (2015)
Linus Feiten, Tobias Martin, Matthias Sauer, Bernd Becker
Improving RO-PUF quality on FPGAs by incorporating design-dependent frequency biases. ETS (2015)
Dominik Erb, Karsten Scheibler, Matthias Sauer, Sudhakar M. Reddy, Bernd Becker
Multi-cycle Circuit Parameter Independent ATPG for interconnect open defects. VTS (2015)
Andreas Riefert, Matthias Sauer, Sudhakar M. Reddy, Bernd Becker
Improving diagnosis resolution of a fault detection test set. VTS (2015)
Dominik Erb, Michael A. Kochte, Sven Reimer, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker
Accurate QBF-Based Test Pattern Generation in Presence of Unknown Values. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (12) (2015)
Dominik Erb, Karsten Scheibler, Matthias Sauer, Sudhakar M. Reddy, Bernd Becker
Circuit Parameter Independent Test Pattern Generation for Interconnect Open Defects. ATS (2014)
Sven Reimer, Matthias Sauer, Tobias Schubert, Bernd Becker
Incremental Encoding and Solving of Cardinality Constraints. ATVA (2014)
Andreas Riefert, Lyl M. Ciganda, Matthias Sauer, Paolo Bernardi, Matteo Sonza Reorda, Bernd Becker
An effective approach to automatic functional processor test generation for small-delay faults. DATE (2014)
Matthias Sauer, Ilia Polian, Michael E. Imhof, Abdullah Mumtaz, Eric Schneider, Alexander Czutro, Hans-Joachim Wunderlich, Bernd Becker
Variation-aware deterministic ATPG. ETS (2014)
Matthias Sauer, Stefan Kupferschmid
A Formal Approach to the Traveling Professor Problem. Aspekte der Technischen Informatik (2014)
Matthias Sauer, Sven Reimer, Sudhakar M. Reddy, Bernd Becker
Efficient SAT-Based Circuit Initialization for Larger Designs. VLSI Design (2014)
Dominik Erb, Michael A. Kochte, Matthias Sauer, Stefan Hillebrecht, Tobias Schubert, Hans-Joachim Wunderlich, Bernd Becker
Exact Logic and Fault Simulation in Presence of Unknowns. ACM Trans. Design Autom. Electr. Syst. 19 (3) (2014)
Dominik Erb, Karsten Scheibler, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker
Test pattern generation in presence of unknown values based on restricted symbolic logic. ITC (2014)
Sven Reimer, Matthias Sauer, Tobias Schubert, Bernd Becker
Using MaxBMC for Pareto-optimal circuit initialization. DATE (2014)
Bernd Becker, Rolf Drechsler, Stephan Eggersglüß, Matthias Sauer
Recent advances in SAT-based ATPG: Non-standard fault models, multi constraints and optimization. DTIS (2014)
Sven Reimer, Matthias Sauer, Paolo Marin, Bernd Becker
QBF with Soft Variables. Electron. Commun. Eur. Assoc. Softw. Sci. Technol. 70 (2014)
Dominik Erb, Karsten Scheibler, Matthias Sauer, Bernd Becker
Efficient SMT-based ATPG for interconnect open defects. DATE (2014)
Karina Gitina, Sven Reimer, Matthias Sauer, Ralf Wimmer, Christoph Scholl, Bernd Becker
Equivalence checking of partial designs using dependency quantified Boolean formulae. ICCD (2013)
Young Moon Kim, Jun Seomun, Hyung-Ock Kim, Kyung Tae Do, Jung Yun Choi, Kee Sup Kim, Matthias Sauer, Bernd Becker, Subhasish Mitra
Detection of early-life failures in high-K metal-gate transistors and ultra low-K inter-metal dielectrics. CICC (2013)
Karina Gitina, Sven Reimer, Matthias Sauer, Ralf Wimmer, Christoph Scholl, Bernd Becker
Equivalence Checking for Partial Implementations Revisited. MBMV (2013)
Matthias Sauer, Sven Reimer, Ilia Polian, Tobias Schubert, Bernd Becker
Provably optimal test cube generation using quantified boolean formula solving. ASP-DAC (2013)
Andreas Riefert, Jörg Müller, Matthias Sauer, Wolfram Burgard, Bernd Becker
Identification of critical variables using an FPGA-based fault injection framework. VTS (2013)
Benjamin Andres, Matthias Sauer, Martin Gebser, Tobias Schubert, Bernd Becker, Torsten Schaub
Accurate Computation of Sensitizable Paths Using Answer Set Programming. LPNMR (2013)
Matthias Sauer, Alexander Czutro, Tobias Schubert, Stefan Hillebrecht, Ilia Polian, Bernd Becker
SAT-Based Analysis of Sensitizable Paths. IEEE Des. Test 30 (4) (2013)
Matthias Sauer, Sven Reimer, Tobias Schubert, Ilia Polian, Bernd Becker
Efficient SAT-based dynamic compaction and relaxation for longest sensitizable paths. DATE (2013)
Linus Feiten, Andreas Spilla, Matthias Sauer, Tobias Schubert, Bernd Becker
Implementation and Analysis of Ring Oscillator PUFs on 60 nm Altera Cyclone FPGAs. Inf. Secur. J. A Glob. Perspect. 22 (5-6) (2013)
Kohei Miyase, Matthias Sauer, Bernd Becker, Xiaoqing Wen, Seiji Kajihara
Search Space Reduction for Low-Power Test Generation. Asian Test Symposium (2013)
Matthias Sauer, Young Moon Kim, Jun Seomun, Hyung-Ock Kim, Kyung Tae Do, Jung Yun Choi, Kee Sup Kim, Subhasish Mitra, Bernd Becker
Early-life-failure detection using SAT-based ATPG. ITC (2013)
Dominik Erb, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker
Accurate Multi-cycle ATPG in Presence of X-Values. Asian Test Symposium (2013)
Alexander Czutro, Matthias Sauer, Ilia Polian, Bernd Becker
Multi-conditional SAT-ATPG for power-droop testing. ETS (2012)
Matthias Sauer, Stefan Kupferschmid, Alejandro Czutro, Sudhakar M. Reddy, Bernd Becker
Analysis of Reachable Sensitisable Paths in Sequential Circuits with SAT and Craig Interpolation. VLSI Design (2012)
Linus Feiten, Matthias Sauer, Tobias Schubert, Alexander Czutro, Eberhard Böhl, Ilia Polian, Bernd Becker
#SAT-based vulnerability analysis of security components - A case study. DFT (2012)
Alexander Czutro, Matthias Sauer, Tobias Schubert, Ilia Polian, Bernd Becker
SAT-ATPG using preferences for improved detection of complex defect mechanisms. VTS (2012)
Matthias Sauer, Alexander Czutro, Bernd Becker, Ilia Polian
On the quality of test vectors for post-silicon characterization. ETS (2012)
Matthias Sauer, Stefan Kupferschmid, Alexander Czutro, Ilia Polian, Sudhakar M. Reddy, Bernd Becker
Functional test of small-delay faults using SAT and Craig interpolation. ITC (2012)
Matthias Sauer, Alexander Czutro, Ilia Polian, Bernd Becker
Small-delay-fault ATPG with waveform accuracy. ICCAD (2012)
Alexander Czutro, Michael E. Imhof, J. Jiang, Abdullah Mumtaz, Matthias Sauer, Bernd Becker, Ilia Polian, Hans-Joachim Wunderlich
Variation-Aware Fault Grading. Asian Test Symposium (2012)
Jie Jiang, Matthias Sauer, Alexander Czutro, Bernd Becker, Ilia Polian
On the optimality of K longest path generation algorithm under memory constraints. DATE (2012)
Matthias Sauer, Victor Tomashevich, Jörg Müller, Matthew Lewis, Andreas Spilla, Ilia Polian, Bernd Becker, Wolfram Burgard
An FPGA-based framework for run-time injection and analysis of soft errors in microprocessors. IOLTS (2011)
Matthias Sauer, Jie Jiang, Alejandro Czutro, Ilia Polian, Bernd Becker
Efficient SAT-Based Search for Longest Sensitisable Paths. Asian Test Symposium (2011)
Matthias Sauer, Alexander Czutro, Tobias Schubert, Stefan Hillebrecht, Ilia Polian, Bernd Becker
SAT-based analysis of sensitisable paths. DDECS (2011)
Matthias Sauer, Alejandro Czutro, Ilia Polian, Bernd Becker
Estimation of component criticality in early design steps. IOLTS (2011)

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Publication Activity (10 Years)

Top Topics

Top Venues

Matthias Sauer