Towards the formal verification of security properties of a Network-on-Chip router.
Johanna SepúlvedaDamian Aboul-HassanGeorg SiglBernd BeckerMatthias SauerPublished in: ETS (2018)
Keyphrases
- network on chip
- formal verification
- security properties
- cryptographic protocols
- routing algorithm
- model checking
- network simulator
- formal model
- security analysis
- multi processor
- security requirements
- formal methods
- security protocols
- data transfer
- ad hoc networks
- power dissipation
- interconnection networks
- shortest path
- response time
- authentication protocol
- security mechanisms
- multipath
- routing protocol