Sachin B. Patkar

Publication Activity (10 Years)

Years Active: 1991-2024
Publications (10 Years): 26

Top Topics

Projective Geometry

Object Tracking

Top Venues

Publications

Mandar Datar, Dhruva S. Hegde, Vendra Durga Prasad, Manish Prajapati, Neralla Manikanta, Devansh Gupta, Janampalli Pavanija, Pratyush Pare, Akash, Shivam Gupta, Sachin B. Patkar
Python-based DSL for generating Verilog model of Synchronous Digital Circuits. CoRR (2024)
Ankit Bende, Simranjeet Singh, Chandan Kumar Jha, Tim Kempen, Felix Cüppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin B. Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array. VLSID (2024)
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory. ASPDAC (2024)
Simranjeet Singh, Ankit Bende, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Sachin B. Patkar, Farhad Merchant
In-Memory Mirroring: Cloning Without Reading. CoRR (2024)
Simranjeet Singh, Farhad Merchant, Sachin B. Patkar
Resistive Memory for Computing and Security: Algorithms, Architectures, and Platforms. CoRR (2024)
Simranjeet Singh, Furqan Zahoor, Gokulnath Rajendran, Vikas Rana, Sachin B. Patkar, Anupam Chattopadhyay, Farhad Merchant
Integrated Architecture for Neural Networks and Security Primitives using RRAM Crossbar. CoRR (2023)
Simranjeet Singh, Omar Ghazal, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Rishad A. Shafik, Alex Yakovlev, Sachin B. Patkar, Farhad Merchant
Finite State Automata Design using 1T1R ReRAM Crossbar. NEWCAS (2023)
Simranjeet Singh, Furqan Zahoor, Gokulnath Rajendran, Vikas Rana, Sachin B. Patkar, Anupam Chattopadhyay, Farhad Merchant
Integrated Architecture for Neural Networks and Security Primitives using RRAM Crossbar. NEWCAS (2023)
Ankit Bende, Simranjeet Singh, Chandan Kumar Jha, Tim Kempen, Felix Cüppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin B. Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array. CoRR (2023)
Niraj N. Sharma, Riya Jain, Mohana Madhumita Pokkuluri, Sachin B. Patkar, Rainer Leupers, Rishiyur S. Nikhil, Farhad Merchant
CLARINET: A quire-enabled RISC-V-based framework for posit arithmetic empiricism. J. Syst. Archit. 135 (2023)
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style. CoRR (2023)
Simranjeet Singh, Elmira Moussavi, Christopher Bengel, Sachin B. Patkar, Rainer Waser, Rainer Leupers, Vikas Rana, Vivek Pachauri, Stephan Menzel, Farhad Merchant
Exploring Multi-Valued Logic and its Application in Emerging Post-CMOS Technologies. NANOARCH (2023)
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory. CoRR (2023)
Omar Ghazal, Simranjeet Singh, Tousif Rahman, Shengqi Yu, Yujin Zheng, Domenico Balsamo, Sachin B. Patkar, Farhad Merchant, Fei Xia, Alex Yakovlev, Rishad A. Shafik
IMBUE: In-Memory Boolean-to-CUrrent Inference ArchitecturE for Tsetlin Machines. ISLPED (2023)
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style. IEEE Embed. Syst. Lett. 15 (4) (2023)
Yogesh Mahajan, Shashank Obla, Mini K. Namboothiripad, Mandar J. Datar, Niraj N. Sharma, Sachin B. Patkar
FPGA-Based Acceleration of LU decomposition for Analog and RF Circuit Simulation. VLSI Design (2020)
Prathmesh Sawant, Yashwant Temburu, Mandar Datar, Imran Ahmed, Vinayak Shriniwas, Sachin B. Patkar
Single Storage Semi-Global Matching for Real Time Depth Processing. CoRR (2020)
Yashwant Temburu, Mandar Datar, Simranjeet Singh, Vaibhav Malviya, Sachin B. Patkar
Real time System Implementation for Stereo 3D Mapping and Visual Odometry. IPAS (2020)
Pinalkumar Engineer, Rajbabu Velmurugan, Sachin B. Patkar
Scalable implementation of particle filter-based visual object tracking on network-on-chip (NoC). J. Real Time Image Process. 17 (5) (2020)
Imran A. Syed, Mandar Datar, Sachin B. Patkar
Accelerated Stereo Vision Using Nvidia Jetson and Intel AVX. CVIP (2) (2020)
Shreeniwas N. Sapre, Sachin B. Patkar, Supratim Biswas
Computational Issues in Construction of 4-D Projective Spaces with Perfect Access Patterns for Higher Primes. PaCT (2019)
Vinay B. Y. Kumar, Deval Shah, Mandar Datar, Sachin B. Patkar
Lightweight Forth Programmable NoCs. VLSI Design (2018)
Vinay B. Y. Kumar, Kulshreshth Dhiman, Mandar Datar, Akash Pacharne, H. Narayanan, Sachin B. Patkar
Relaxation Based Circuit Simulation Acceleration over CPU-FPGA. VLSI Design (2016)
Vinay B. Y. Kumar, Pinalkumar Engineer, Mandar Datar, Yatish Turakhia, Saurabh Agarwal, Sanket Diwale, Sachin B. Patkar
Framework for Application Mapping over Packet-Switched Network of FPGAs: Case Studies. CoRR (2015)
Pinalkumar Engineer, Rajbabu Velmurugan, Sachin B. Patkar
Parameterizable FPGA Framework for Particle Filter Based Object Tracking in Video. VLSI Design (2015)
Satyabrata Dash, Vivek Bangera, Vinay B. Y. Kumar, Gaurav Trivedi, Sachin B. Patkar
Parallel two step random walk algorithm to analyze VLSI power grid networks. VDAT (2015)
Vinay B. Y. Kumar, Shovan Maity, Sachin B. Patkar
Storage-allocation to sequential structures in High-Level Synthesis-assisted prototyping. ICCD (2014)
Janak Porwal, Sanket Diwale, Vinay B. Y. Kumar, Sachin B. Patkar
Projective Geometry and precedence constraint based application mapping on multicore network-on-chip systems. VLSI-DAT (2014)
Vivek Kumar, Vinay B. Y. Kumar, Sachin B. Patkar
FPGA-based implementation of M4RM for matrix multiplication over GF(2). VDAT (2014)
Prateek Saxena, Vinay B. Y. Kumar, Dilawar Singh, H. Narayanan, Sachin B. Patkar
Hardware-software Scalable Architectures for Gaussian Elimination over GF(2) and Higher Galois Fields. PECCS (2013)
Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
Memory Efficient Implementation of Two Graph Based Circuit Simulator for PDE-Electrical Analogy. VLSI Design (2013)
Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
Solution of PDEs-electrically coupled systems with electrical analogy. Integr. 46 (4) (2013)
Sumeet Agrawal, Pinal Engineer, Rajbabu Velmurugan, Sachin B. Patkar
FPGA Implementation of Particle Filter Based Object Tracking in Video. ISED (2012)
Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
Two Graph Based Circuit Simulator for PDE-Electrical Analogy. VLSI Design (2012)
Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
Solution of Partial Differential Equations by electrical analogy. J. Comput. Sci. 2 (1) (2011)
Sumedh Attarde, Siddharth Joshi, Yash Deshpande, Sunil Puranik, Sachin B. Patkar
Double Precision Sparse Matrix Vector Multiplication Accelerator on FPGA. PECCS (2011)
Vinay B. Y. Kumar, Siddharth Joshi, Sachin B. Patkar, H. Narayanan
FPGA Based High Performance Double-Precision Matrix Multiplication. Int. J. Parallel Program. 38 (3-4) (2010)
Subhendu Roy, Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
Large Scale VLSI Circuit Simulation Using Point Relaxation. CSC (2010)
Anirudh Maringanti, Viraj Athavale, Sachin B. Patkar
Acceleration of conjugate gradient method for circuit simulation using CUDA. HiPC (2009)
Dinesh Baviskar, Sachin B. Patkar
A Pipelined Simulation Approach for Logic Emulation using Multi-FPGA Platforms. ISCAS (2009)
V. Siva Sankar, H. Narayanan, Sachin B. Patkar
Exploiting Hybrid Analysis in Solving Electrical Networks. VLSI Design (2009)
Vinay B. Y. Kumar, Siddharth Joshi, Sachin B. Patkar, H. Narayanan
FPGA Based High Performance Double-Precision Matrix Multiplication. VLSI Design (2009)
Janak Porwal, Sachin B. Patkar
Algorithms For Scheduling Of Data Transfer Across FPGAs In A Grid. ERSA (2005)
Sachin B. Patkar, H. Narayanan
An Efficient Practical Heuristic For Good Ratio-Cut Partitioning. VLSI Design (2003)
Madhav P. Desai, H. Narayanan, Sachin B. Patkar
The realization of finite state machines by decomposition and the principal lattice of partitions of a submodular function. Discret. Appl. Math. 131 (2) (2003)
Sachin B. Patkar, H. Narayanan
Improving graph partitions using submodular functions. Discret. Appl. Math. 131 (2) (2003)
Sachin B. Patkar, H. Narayanan
Fast On-Line/Off-Line Algorithms for Optimal Reinforcement of a Network and its Connections with Principal Partition. J. Comb. Optim. 7 (1) (2003)
Satoru Fujishige, Sachin B. Patkar
Realization of set functions as cut functions of graphs and hypergraphs. Discret. Math. 226 (1-3) (2001)
Sachin B. Patkar, H. Narayanan
A note on optimal covering augmentation for graphic polymatroids. Inf. Process. Lett. 79 (6) (2001)
Sachin B. Patkar, H. Narayanan
Fast On-Line/Off-Line Algorithms for Optimal Reinforcement of a Network and Its Connections with Principal Partition. FSTTCS (2000)
C. R. Venugopal, S. S. S. P. Rao, Sachin B. Patkar
Priority Scheduling in Parallel I/O Systems. PDPTA (1999)
Sachin B. Patkar, Shabbir H. Batterywala, M. Chandramouli, H. Narayanan
A New Partitioning Strategy Based on Supermodular Functions. VLSI Design (1997)
H. Narayanan, Subir Roy, Sachin B. Patkar
Approximation Algorithms for Min-k-Overlap Problems Using the Principal Lattice of Partitions Approach. J. Algorithms 21 (2) (1996)
H. Narayanan, Subir Roy, Sachin B. Patkar
Approximation Algorithms for Min-k-overlap Problems Using the Principal Lattice of Partitions Approach. MFCS (1994)
Sachin B. Patkar, Brigitte Servatius, K. V. Subrahmanyam
Abstract and Generic Rigidity in the Plane. J. Comb. Theory, Ser. B 62 (1) (1994)
Sachin B. Patkar, H. Narayanan
Fast Sequential and Randomised Parallel Algorithms for Rigidity and approximate Min k-cut. FSTTCS (1992)
Sachin B. Patkar, H. Narayanan
Principal Lattice of Partition of submodular functions on Graphs: Fast algorithms for Principal Partition and Generic Rigidity. ISAAC (1992)
Sachin B. Patkar, H. Narayanan
A Fast Algorithm for the Principle Partition of a Graph. FSTTCS (1991)