Gaurav Trivedi

Publication Activity (10 Years)

Years Active: 2006-2024
Publications (10 Years): 80

Top Topics

Myocardial Infarction

Language Processing

Top Venues

RADIOELEKTRONIKA

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Rushik Parmar, Khushil Yadav, Gauraangi Anand, Gaurav Trivedi
An SNN-Inspired Area- and Power-Efficient VLSI Architecture of Myocardial Infarction Classifier for Wearable Devices. IEEE Trans. Circuits Syst. II Express Briefs 71 (6) (2024)
Raghuvendra Pratap Tripathi, Virat Krishna, Manish Tiwari, Gaurav Trivedi, Amit Dhawan, Prashant Kumar
Low complexity, high throughput, energy efficient, pipelined and reconfigurable ASIC realization architecture for multi-layer perceptron models. Neurocomputing 598 (2024)
Bipul Boro, Rushik Parmar, Ashvinikumar Dongre, Gaurav Trivedi
Reprogrammable Time-Domain RRAM Based Vector Matrix Multiplier for In-Memory Computing. ISQED (2024)
Ananda Y. R., Arkadeep Hajra, Gaurav Trivedi
An Adaptive Window Function based Memristor Model. RADIOELEKTRONIKA (2023)
Ashvinikumar Dongre, Bipul Boro, Gaurav Trivedi
ADC-Less Reprogrammable RRAM Array Architecture for In-Memory Computing. IEEE Trans. Very Large Scale Integr. Syst. 31 (12) (2023)
Rushik Parmar, Meenali Janveja, Jan Pidanic, Gaurav Trivedi
Design of DNN-Based Low-Power VLSI Architecture to Classify Atrial Fibrillation for Wearable Devices. IEEE Trans. Very Large Scale Integr. Syst. 31 (3) (2023)
Ashvinikumar Dongre, Gaurav Trivedi
RRAM-Based Energy Efficient Scalable Integrate and Fire Neuron With Built-In Reset Circuit. IEEE Trans. Circuits Syst. II Express Briefs 70 (3) (2023)
Ashvinikumar Dongre, Gaurav Trivedi
Binary Synaptic Array for Inference and Training with Built-in RRAM Electroforming Circuit. ISQED (2023)
Meenali Janveja, Ashwani Kumar Sharma, Abhyuday Bhardwaj, Jan Pidanic, Gaurav Trivedi
An Optimized Low-Power VLSI Architecture for ECG/VCG Data Compression for IoHT Wearable Device Application. IEEE Trans. Very Large Scale Integr. Syst. 31 (12) (2023)
Bikram Paul, Angana Nath, Srinivasan Krishnaswamy, Jan Pidanic, Zdenek Nemec, Gaurav Trivedi
Tensor Based Multivariate Polynomial Modulo Multiplier for Cryptographic Applications. IEEE Trans. Computers 72 (6) (2023)
Deepak Joshi, Satyabrata Dash, Sushanth Reddy, Rahul Manigilla, Gaurav Trivedi
Multi-objective Hybrid Particle Swarm Optimization and its Application to Analog and RF Circuit Optimization. Circuits Syst. Signal Process. 42 (8) (2023)
Ankita Tiwari, Prithwijit Guha, Gaurav Trivedi, Nitesh Gupta, Navneeth Jayaraj, Jan Pidanic
IndiRA: Design and Implementation of a Pipelined RISC-V Processor. RADIOELEKTRONIKA (2023)
Naorem Yaipharenba Meitei, Krishna Lal Baishnab, Gaurav Trivedi
Fast power density aware three-dimensional integrated circuit floorplanning for hard macroblocks using best operator combination genetic algorithm. Int. J. Circuit Theory Appl. 51 (10) (2023)
Sushree Sila P. Goswami, Gaurav Trivedi
Comparison of Hardware Implementations of Cryptographic Algorithms for IoT Applications. RADIOELEKTRONIKA (2023)
Ananda Y. R., Subhashis Das, Gaurav Trivedi
A Novel Dynamic Memristor Window Function for High Frequency Applications. NEWCAS (2023)
Meenali Janveja, Rushik Parmar, Gaurav Trivedi
MInSC: A VLSI Architecture for Myocardial Infarction Stages Classifier for Wearable Healthcare Applications. IEEE Trans. Circuits Syst. II Express Briefs 70 (3) (2023)
Ananda Y. R., Gadipelli Sriharsha Satyanarayan, Gaurav Trivedi
A High Frequency MOS-Based Floating Charge-Controlled Memcapacitor Emulator. IEEE Trans. Circuits Syst. II Express Briefs 70 (3) (2023)
Ananda Y. R., Nehal Raj, Gaurav Trivedi
A MOS-DTMOS Implementation of Floating Memristor Emulator for High-Frequency Applications. IEEE Trans. Very Large Scale Integr. Syst. 31 (3) (2023)
Bipul Boro, Ashvinikumar Dongre, Rushik Parmar, Gaurav Trivedi
Programmable Binary Weighted Time-Domain Vector Matrix Multiplier for In-Memory Computing. APCCAS (2023)
Bikram Paul, Tarun Kumar Yadav, Balbir Singh, Srinivasan Krishnaswamy, Gaurav Trivedi
A Resource Efficient Software-Hardware Co-Design of Lattice-Based Homomorphic Encryption Scheme on the FPGA. IEEE Trans. Computers 72 (5) (2023)
Sushree Sila P. Goswami, Gaurav Trivedi
FPGA Implementation of Modified SNOW 3G Stream Ciphers Using Fast and Resource Efficient Substitution Box. IEEE Embed. Syst. Lett. 15 (4) (2023)
Ananda Y. R., Gadipelli Sriharsha Satyanarayan, Gaurav Trivedi
An Optimized MOS-Based High Frequency Charge-Controlled Memcapacitor Emulator. IEEE J. Emerg. Sel. Topics Circuits Syst. 12 (4) (2022)
Meenali Janveja, Gaurav Trivedi
An area and power efficient VLSI architecture for ECG feature extraction for wearable IoT healthcare applications. Integr. 82 (2022)
Ananda Y. R., Gadipelli Sriharsha Satyanarayan, Gaurav Trivedi
A Flux Controlled MOS-Based Optimized High Frequency Meminductor Emulator. IEEE J. Emerg. Sel. Topics Circuits Syst. 12 (4) (2022)
Tomás Krejcí, Tomás Zálabský, Dusan Kopecký, Gaurav Trivedi
Application of hash function for generation of modulation data in RadCom system. Digit. Signal Process. 130 (2022)
Bikram Paul, Souradip Pal, Abhishek Agrawal, Gaurav Trivedi
Triple Pendulum Based Nonlinear Chaos Generator and its Applications in Cryptography. IEEE Access 10 (2022)
Jan Pidanic, Arpan Vyas, Rishav Karki, Prateek Vij, Gaurav Trivedi, Zdenek Nemec
A Scalable and Adaptive Convolutional Neural Network Accelerator. RADIOELEKTRONIKA (2022)
Meenali Janveja, Rushik Parmar, Gaurav Trivedi, Jan Pidanic, Zdenek Nemec
An Energy Efficient and Resource Optimal VLSI Architecture for ECG Feature Extraction for Wearable Healthcare Applications. RADIOELEKTRONIKA (2022)
Saras Mani Mishra, Ankita Tiwari, Hanumant Singh Shekhawat, Prithwijit Guha, Gaurav Trivedi, Jan Pidanic, Zdenek Nemec
Comparison of Floating-point Representations for the Efficient Implementation of Machine Learning Algorithms. RADIOELEKTRONIKA (2022)
Saras Mani Mishra, Hanumant Singh Shekhawat, Gaurav Trivedi, Jan Pidanic, Zdenek Nemec
Design and Implementation of a Low Power Area Efficient Bfloat16 based CORDIC Processor. RADIOELEKTRONIKA (2022)
Sumit Agarwal, Shaik Rafi Ahamed, Anup Kumar Gogoi, Gaurav Trivedi
A 28-Gbps Radix-16, 512-Point FFT Processor-Based Continuous Streaming OFDM for WiGig. Circuits Syst. Signal Process. 41 (5) (2022)
Rushik Parmar, Meenali Janveja, Gaurav Trivedi, Jan Pidanic, Zdenek Nemec
An Area and Power Efficient VLSI Architecture to Detect Obstructive Sleep Apnea for Wearable Devices. RADIOELEKTRONIKA (2022)
Ankita Tiwari, Saras Mani Mishra, Prithwijit Guha, Jan Pidanic, Zdenek Nemec, Gaurav Trivedi
Design of a Low Power and Area Efficient Bfloat16 based Generalized Systolic Array for DNN Applications. RADIOELEKTRONIKA (2022)
Meenali Janveja, Rushik Parmar, Mayank Tantuway, Gaurav Trivedi
A DNN-Based Low Power ECG Co-Processor Architecture to Classify Cardiac Arrhythmia for Wearable Devices. IEEE Trans. Circuits Syst. II Express Briefs 69 (4) (2022)
Sumit Agarwal, Shaik Rafi Ahamed, Anup Kumar Gogoi, Gaurav Trivedi
A Low-Complexity Shifting-Based Conflict-Free Memory-Addressing Architecture for Higher-Radix FFT. IEEE Access 9 (2021)
Sushanta Bordoloi, Ashok Ray, Gaurav Trivedi
Introspection Into Reliability Aspects in AlGaN/GaN HEMTs With Gate Geometry Modification. IEEE Access 9 (2021)
Sukanta Dey, Sukumar Nandi, Gaurav Trivedi
Machine Learning for VLSI CAD: A Case Study in On-Chip Power Grid Design. ISVLSI (2021)
Sukanta Dey, Sukumar Nandi, Gaurav Trivedi
PGOpt: Multi-objective design space exploration framework for large-Scale on-chip power grid design in VLSI SoC using evolutionary computing technique. Microprocess. Microsystems 81 (2021)
Meenali Janveja, Mayank Tantuway, Ketan Chaudhari, Gaurav Trivedi
Design of Low Power VLSI Architecture for Classification of Arrhythmic Beats Using DNN for Wearable Device Applications. NorCAS (2021)
Sukanta Dey, Sukumar Nandi, Gaurav Trivedi
PowerPlanningDL: Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning. CoRR (2020)
Shikhar Gupta, Arpan Vyas, Gaurav Trivedi
FPGA Implementation of Simplified Spiking Neural Network. CoRR (2020)
Naorem Yaipharenba Meitei, Krishna Lal Baishnab, Gaurav Trivedi
3D-IC partitioning method based on genetic algorithm. IET Circuits Devices Syst. 14 (7) (2020)
Krishna Mohan Dwivedi, Gaurav Trivedi, Sunil K. Khijwania
Theoretical Study and Optimization of Apodized Fiber Bragg Grating for Single and Quasi-distributed Structural Health Monitoring Applications. RADIOELEKTRONIKA (2020)
Sarfraz Hussain, Rajesh Kumar, Gaurav Trivedi
Methodology and comparative design of an efficient 4-bit encoder with bubble error corrector for 1-GSPS flash type ADC. IET Circuits Devices Syst. 14 (5) (2020)
Sukanta Dey, Sukumar Nandi, Gaurav Trivedi
PowerPlanningDL: Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning. DATE (2020)
Sushree Sila P. Goswami, Bikram Paul, Sunil Dutt, Gaurav Trivedi
Comparative Review of Approximate Multipliers. RADIOELEKTRONIKA (2020)
Sukanta Dey, Sukumar Nandi, Gaurav Trivedi
Machine Learning Approach for Fast Electromigration Aware Aging Prediction in Incremental Design of Large Scale On-chip Power Grid Network. ACM Trans. Design Autom. Electr. Syst. 25 (5) (2020)
Shikhar Gupta, Arpan Vyas, Gaurav Trivedi
FPGA Implementation of Simplified Spiking Neural Network. ICECS (2020)
Meenali Janveja, Bikram Paul, Gaurav Trivedi, Gonella Vijayakanthi, Astha Agrawal, Jan Pidanic, Zdenek Nemec
Design of Efficient AES Architecture for Secure ECG Signal Transmission for Low-power IoT Applications. RADIOELEKTRONIKA (2020)
Gaurav Trivedi, Esmaeel R. Dadashzadeh, Robert M. Handzel, Wendy W. Chapman, Shyam Visweswaran, Harry Hochheiser
Interactive NLP in Clinical Care: Identifying Incidental Findings in Radiology Reports. Appl. Clin. Inform. 10 (04) (2019)
Gaurav Trivedi, Charmgil Hong, Esmaeel R. Dadashzadeh, Robert M. Handzel, Harry Hochheiser, Shyam Visweswaran
Identifying incidental findings from radiology reports of trauma patients: An evaluation of automated feature representation methods. Int. J. Medical Informatics 129 (2019)
Koushik Bharadwaj, Ashok Ray, Sushanta Bordoloi, Gaurav Trivedi
Current Collapse Reduction Technique Using N-Doped Buffer Layer into the Bulk Region of a Gate Injection Transistor. VLSI Design (2019)
Sunil Dutt, Satyabrata Dash, Sukumar Nandi, Gaurav Trivedi
Analysis, Modeling and Optimization of Equal Segment Based Approximate Adders. IEEE Trans. Computers 68 (3) (2019)
Satyabrata Dash, Gaurav Trivedi
Convergence Analysis of River Formation Dynamics Algorithm. SMC (2019)
Ajeyo Dey, Satyabrata Dash, Likhita Tumati, Saumitra Sharma, Nikhil Megharajani, Meenali Janveja, Ismael Rodríguez, Gaurav Trivedi
A Cooperative Co-evolution based Scalable Framework for Solving Large-Scale Global optimization Problems. SMC (2019)
Satyabrata Dash, Sukanta Dey, Anish Augustine, Sankar Dhar, Jan Pidanic, Zdenek Nemec, Gaurav Trivedi
RiverOpt: A Multiobjective Optimization Framework Based on Modified River Formation Dynamics Heuristic. VLSI Design (2019)
Bikram Paul, Apratim Khobragade, Soumith Javvaji Sai, Sushree Sila P. Goswami, Sunil Dutt, Gaurav Trivedi
Design and Implementation of Low-Power High-throughput PRNGs for Security Applications. VLSI Design (2019)
Sunil Dutt, Sukumar Nandi, Gaurav Trivedi
Analysis and Design of Adders for Approximate Computing. ACM Trans. Embed. Comput. Syst. 17 (2) (2018)
Gaurav Trivedi, Phuong Pham, Wendy W. Chapman, Rebecca Hwa, Janyce Wiebe, Harry Hochheiser
NLPReViz: an interactive tool for natural language processing on clinical text. J. Am. Medical Informatics Assoc. 25 (1) (2018)
Sunil Dutt, Sukumar Nandi, Gaurav Trivedi
Accuracy enhancement of equal segment based approximate adders. IET Comput. Digit. Tech. 12 (5) (2018)
Sukanta Dey, Satyabrata Dash, Sukumar Nandi, Gaurav Trivedi
PGIREM: Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks Using Cooperative Coevolution. ISVLSI (2018)
Gaurav Trivedi, Robert M. Handzel, Shyam Visweswaran, Wendy W. Chapman, Harry Hochheiser
An Interactive NLP Tool for Signout Note Preparation. ICHI (2018)
Gaurav Trivedi
Towards Interactive Natural Language Processing in Clinical Care. ICHI (2018)
Sameer Pawanekar, Kalpesh Kapoor, Gaurav Trivedi
: A High-Quality VLSI Placement Tool Using Nesterov's Method for Density Penalty. J. Circuits Syst. Comput. 27 (8) (2018)
Satyabrata Dash, Deepak Joshi, Gaurav Trivedi
Multiobjective analog/RF circuit sizing using an improved brain storm optimization algorithm. Memetic Comput. 10 (4) (2018)
Satyabrata Dash, Sukanta Dey, Deepak Joshi, Gaurav Trivedi
Minimizing area of VLSI power distribution networks using river formation dynamics. J. Syst. Inf. Technol. 20 (4) (2018)
Sarfraz Hussain, Rajesh Kumar, Gaurav Trivedi
Comparison and Design of Dynamic Comparator in 180nm SCL Technology for Low Power and High Speed Flash ADC. iNIS (2017)
Sameer Pawanekar, Gaurav Trivedi
Analytical Partitioning: Improvement over FM. VDAT (2017)
Sarfraz Hussain, Rajesh Kumar, Gaurav Trivedi
A Novel Low Power High Speed BEC for 2GHz Sampling Rate Flash ADC in 45nm Technology. iNIS (2017)
Sameer Pawanekar, Gaurav Trivedi
Fast FPGA Placement Using Analytical Optimization. VDAT (2017)
Gaurav Trivedi, Phuong Pham, Wendy W. Chapman, Rebecca Hwa, Janyce Wiebe, Harry Hochheiser
An Interactive Tool for Natural Language Processing on Clinical Text. CoRR (2017)
Pankaj Kumar, Syed Samsuz Zaman, Manash Pratim Sarma, Ashok Ray, Gaurav Trivedi
Basic CMOS Gate Design by Mixed-Mode Analysis of Step-Channel TMDG-MOSFET. iNIS (2017)
Syed Samsuz Zaman, Pankaj Kumar, Manash Pratim Sarma, Ashok Ray, Gaurav Trivedi
Design and Simulation of SF-FinFET and SD-FinFET and Their Performance in Analog, RF and Digital Applications. iNIS (2017)
Ashok Ray, Gaurav Kumar, Sushanta Bordoloi, Dheeraj Kumar Sinha, Pratima Agarwal, Gaurav Trivedi
FEM Based Device Simulator for High Voltage Devices. VDAT (2017)
Sunil Dutt, Bikram Paul, Anshu Chauhan, Sukumar Nandi, Gaurav Trivedi
Approxhash: delay, power and area optimized approximate hash functions for cryptography applications. SIN (2017)
Deepak Joshi, Satyabrata Dash, Ayush Malhotra, Pulimi Venkata Sai, Rahul Das, Dikshit Sharma, Gaurav Trivedi
Optimization of 2.4 GHz CMOS Low Noise Amplifier Using Hybrid Particle Swarm Optimization with Lévy Flight. VLSI Design (2017)
Sukanta Dey, Satyabrata Dash, Sukumar Nandi, Gaurav Trivedi
Markov Chain Model Using Lévy Flight for VLSI Power Grid Analysis. VLSI Design (2017)
Sunil Dutt, Harsh Patel, Sukumar Nandi, Gaurav Trivedi
Exploring Approximate Computing for Yield Improvement via Re-design of Adders for Error-Resilient Applications. VLSI Design (2016)
Satyabrata Dash, Krishna Lal Baishnab, Gaurav Trivedi
Applying River Formation Dynamics to Analyze VLSI Power Grid Networks. VLSI Design (2016)
Dheeraj Kumar Sinha, Amitabh Chatterjee, Vishnuram Abhinav, Gaurav Trivedi, Victor Koldyaev
A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET. VLSI Design (2016)
Gaurav Trivedi
Clinical Text Analysis Using Interactive Natural Language Processing. IUI Companion (2015)
Sameer Pawanekar, Gaurav Trivedi
Net weighing based timing driven standard cell placer. VDAT (2015)
Sameer Pawanekar, Gaurav Trivedi, Kalpesh Kapoor
A Nonlinear Analytical Optimization Method for Standard Cell Placement of VLSI Circuits. VLSI Design (2015)
Jaromír Savelka, Gaurav Trivedi, Kevin D. Ashley
Applying an Interactive Machine Learning Approach to Statutory Analysis. JURIX (2015)
Sameer Pawanekar, Gaurav Trivedi
TSV aware standard cell placement for 3D ICs. VDAT (2015)
Satyabrata Dash, Vivek Bangera, Vinay B. Y. Kumar, Gaurav Trivedi, Sachin B. Patkar
Parallel two step random walk algorithm to analyze VLSI power grid networks. VDAT (2015)
Sunil Dutt, Anshu Chauhan, Sukumar Nandi, Gaurav Trivedi
Variability-aware parametric yield enhancement via post-silicon tuning of hybrid redundant MAC units. VLSI-DAT (2015)
Sunil Dutt, Anshu Chauhan, Rahul Bhadoriya, Sukumar Nandi, Gaurav Trivedi
A High-Performance Energy-Efficient Hybrid Redundant MAC for Error-Resilient Applications. VLSI Design (2015)
Sameer Pawanekar, Kalpesh Kapoor, Gaurav Trivedi
Kapees: A New Tool for Standard Cell Placement. VDAT (2013)
Hemangee K. Kapoor, G. Bhoopal Rao, Sharique Arshi, Gaurav Trivedi
A Security Framework for NoC Using Authenticated Encryption and Session Keys. Circuits Syst. Signal Process. 32 (6) (2013)
Ranjitha Gurunath Kulkarni, Gaurav Trivedi, Tushar Suresh, Miaomiao Wen, Zeyu Zheng, Carolyn P. Rosé
Supporting collaboration in Wikipedia between language communities. ICIC (2012)
Gaurav Trivedi, Sumit Punglia, H. Narayanan
Application of DC Analyzer to Combinatorial Optimization Problems. VLSI Design (2007)
Gaurav Trivedi, H. Narayanan
Application of Fast DC Analysis to Partitioning Hypergraphs. ISCAS (2007)
Gaurav Trivedi, Madhav P. Desai, H. Narayanan
Parallelization of DC Analysis through Multiport Decomposition. VLSI Design (2007)
Gaurav Trivedi, Madhav P. Desai, H. Narayanan
Fast DC Analysis and Its Application to Combinatorial Optimization Problems. VLSI Design (2006)