Comparison and Design of Dynamic Comparator in 180nm SCL Technology for Low Power and High Speed Flash ADC.
Sarfraz HussainRajesh KumarGaurav TrivediPublished in: iNIS (2017)
Keyphrases
- low power
- high speed
- cmos technology
- nm technology
- single chip
- gate array
- power consumption
- low cost
- low power consumption
- vlsi architecture
- logic circuits
- power dissipation
- mixed signal
- digital signal processing
- wireless transmission
- high power
- power reduction
- low voltage
- cmos image sensor
- real time
- ultra low power
- analog to digital converter
- image sensor
- power saving
- silicon on insulator
- vlsi circuits
- energy saving
- design methodology