Design of Low Power VLSI Architecture for Classification of Arrhythmic Beats Using DNN for Wearable Device Applications.
Meenali JanvejaMayank TantuwayKetan ChaudhariGaurav TrivediPublished in: NorCAS (2021)
Keyphrases
- vlsi architecture
- low power
- low cost
- power consumption
- high speed
- vlsi implementation
- single chip
- low complexity
- ultra low power
- logic circuits
- real time
- low power consumption
- digital signal processing
- power dissipation
- cmos technology
- feature vectors
- sensor networks
- mixed signal
- gate array
- image sensor
- motion estimation