Design of Efficient AES Architecture for Secure ECG Signal Transmission for Low-power IoT Applications.
Meenali JanvejaBikram PaulGaurav TrivediGonella VijayakanthiAstha AgrawalJan PidanicZdenek NemecPublished in: RADIOELEKTRONIKA (2020)
Keyphrases
- low power
- vlsi architecture
- single chip
- low cost
- power consumption
- cmos technology
- low power consumption
- mixed signal
- high speed
- logic circuits
- ecg signals
- digital signal processing
- gate array
- wireless transmission
- power dissipation
- multi channel
- design process
- vlsi implementation
- power reduction
- vlsi circuits
- cmos image sensor
- nm technology
- efficient implementation
- heart rate
- design methodology
- low complexity
- smart card
- biomedical signals