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Design of a Low Power and Area Efficient Bfloat16 based Generalized Systolic Array for DNN Applications.
Ankita Tiwari
Saras Mani Mishra
Prithwijit Guha
Jan Pidanic
Zdenek Nemec
Gaurav Trivedi
Published in:
RADIOELEKTRONIKA (2022)
Keyphrases
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low power
power consumption
single chip
low cost
vlsi architecture
low power consumption
logic circuits
high speed
systolic array
design process
gate array
digital signal processing
power reduction
embedded systems
efficient implementation
low complexity
mixed signal
vlsi circuits
nm technology
ultra low power