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An Optimized Low-Power VLSI Architecture for ECG/VCG Data Compression for IoHT Wearable Device Application.
Meenali Janveja
Ashwani Kumar Sharma
Abhyuday Bhardwaj
Jan Pidanic
Gaurav Trivedi
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2023)
Keyphrases
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low power
vlsi architecture
data compression
low cost
ultra low power
power consumption
high speed
low complexity
vlsi implementation
real time
compression algorithm
compression ratio
video sequences
cmos technology
low density parity check