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Design of DNN-Based Low-Power VLSI Architecture to Classify Atrial Fibrillation for Wearable Devices.
Rushik Parmar
Meenali Janveja
Jan Pidanic
Gaurav Trivedi
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2023)
Keyphrases
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vlsi architecture
low power
low cost
power consumption
high speed
vlsi implementation
low complexity
real time
wearable devices
computational complexity
particle filter
signal to noise ratio