Login / Signup
A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET.
Dheeraj Kumar Sinha
Amitabh Chatterjee
Vishnuram Abhinav
Gaurav Trivedi
Victor Koldyaev
Published in:
VLSI Design (2016)
Keyphrases
</>
computer aided
design process
case study
user interface
knowledge based systems
building blocks
input output
high density
database systems
steady state
design methodology
design tools