Yogesh Dilip Save

Publication Activity (10 Years)

Years Active: 2010-2013
Publications (10 Years): 0

Top Topics

Iterative Deepening

Analogical Reasoning

Top Venues

Publications

Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
Memory Efficient Implementation of Two Graph Based Circuit Simulator for PDE-Electrical Analogy. VLSI Design (2013)
Yogesh Dilip Save, Rajalekshmi Rakhi, N. D. Shambhulingayya, Ambikeshwar Srivastava, Manas Ranjan Das, Saket Choudhary, Kannan M. Moudgalya
Oscad: An open source EDA tool for circuit design, simulation, analysis and PCB design. ICECS (2013)
Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
Solution of PDEs-electrically coupled systems with electrical analogy. Integr. 46 (4) (2013)
Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
Two Graph Based Circuit Simulator for PDE-Electrical Analogy. VLSI Design (2012)
Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
Solution of Partial Differential Equations by electrical analogy. J. Comput. Sci. 2 (1) (2011)
Subhendu Roy, Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
Large Scale VLSI Circuit Simulation Using Point Relaxation. CSC (2010)