Sunil P. Khatri

ORCID

Publication Activity (10 Years)

Years Active: 1996-2024
Publications (10 Years): 48

Top Venues

ICCD

ACM Great Lakes Symposium on VLSI

CoRR

IEEE Trans. Computers

Publications

Kyler R. Scott, Cheng-Yen Lee, Sunil P. Khatri, Sarma B. K. Vrudhula
A Mixed-Signal Quantized Neural Network Accelerator Using Flash Transistors. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (3) (2024)
Ankit Wagle, Gian Singh, Sunil P. Khatri, Sarma B. K. Vrudhula
An ASIC Accelerator for QNN With Variable Precision and Tunable Energy Efficiency. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (7) (2024)
Kunal Bharathi, Sunil P. Khatri, Jiang Hu
Scaled Population Division for Approximate Computing. ISLPED (2023)
Cheng-Yen Lee, Kyler R. Scott, Sunil P. Khatri, Ali Ghrayeb
A Hardware Validation Framework for a Networked Dynamic Multi-factor Security Protocol. CommNet (2023)
Cheng-Yen Lee, Sunil P. Khatri, Sarma B. K. Vrudhula
A Novel Pseudo-Flash Based Digital Low Dropout (LDO) Voltage Regulator. ISQED (2023)
Cheng-Yen Lee, Sunil P. Khatri
A Digital Low Dropout (LDO) Voltage Regulator Using Pseudoflash Transistors. IEEE Trans. Very Large Scale Integr. Syst. 31 (12) (2023)
Kyler R. Scott, Sunil P. Khatri
An Extremely Low-voltage Floating Gate Artificial Neuron. ISCAS (2023)
Kyler R. Scott, Sunil P. Khatri
A Flash-based Digital to Analog Converter for Low Power Applications. ICCD (2022)
Ankit Wagle, Gian Singh, Sunil P. Khatri, Sarma B. K. Vrudhula
A Novel ASIC Design Flow using Weight-Tunable Binary Neurons as Standard Cells. CoRR (2022)
Kyler R. Scott, Cheng-Yen Lee, Sunil P. Khatri, Sarma B. K. Vrudhula
A Flash-based Current-mode IC to Realize Quantized Neural Networks. DATE (2022)
Chan-Wei Hu, Jiang Hu, Sunil P. Khatri
TD3lite: FPGA Acceleration of Reinforcement Learning with Structural and Representation Optimizations. FPL (2022)
Ankit Wagle, Gian Singh, Sunil P. Khatri, Sarma B. K. Vrudhula
A Novel ASIC Design Flow Using Weight-Tunable Binary Neurons as Standard Cells. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (7) (2022)
Cheng-Yen Lee, Kunal Bharathi, Joellen Lansford, Sunil P. Khatri
NIST-Lite: Randomness Testing of RNGs on an Energy-Constrained Platform. ICCD (2021)
Abbas A. Fairouz, Monther Abusultan, Viacheslav V. Fedorov, Sunil P. Khatri
Hardware Acceleration of Hash Operations in Modern Microprocessors. IEEE Trans. Computers 70 (9) (2021)
Ankit Wagle, Sunil P. Khatri, Sarma B. K. Vrudhula
A Configurable BNN ASIC using a Network of Programmable Threshold Logic Standard Cells. CoRR (2021)
Gian Singh, Ankit Wagle, Sarma B. K. Vrudhula, Sunil P. Khatri
CIDAN: Computing in DRAM with Artificial Neurons. ICCD (2021)
Gian Singh, Ankit Wagle, Sarma B. K. Vrudhula, Sunil P. Khatri
CIDAN: Computing in DRAM with Artificial Neurons. CoRR (2021)
Kunal Bharathi, Jiang Hu, Sunil P. Khatri
Scaled Population Subtraction for Approximate Computing. ICCD (2020)
He Zhou, Sunil P. Khatri, Jiang Hu, Frank Liu
Scaled Population Arithmetic for Efficient Stochastic Computing. ASP-DAC (2020)
Prasenjit Biswas, Sarit Pal, Sunil P. Khatri
A Mathematical Framework for Exploring Protein Folding Dynamics using Probabilistic Model Checking. ICICT (2020)
Elham Azari, Ankit Wagle, Sunil P. Khatri, Sarma B. K. Vrudhula
A Statistical Methodology for Post-Fabrication Weight Tuning in a Binary Perceptron. ISQED (2020)
Ankit Wagle, Sunil P. Khatri, Sarma B. K. Vrudhula
A Configurable BNN ASIC using a Network of Programmable Threshold Logic Standard Cells. ICCD (2020)
Andrew J. Douglass, Sunil P. Khatri
Fast, Ring-Based Design of 3-D Stacked DRAM. IEEE Trans. Very Large Scale Integr. Syst. 27 (8) (2019)
He Zhou, Sunil P. Khatri, Jiang Hu, Frank Liu
A Memory-Efficient Markov Decision Process Computation Framework Using BDD-based Sampling Representation. DAC (2019)
Ankit Wagle, Gian Singh, Jinghua Yang, Sunil P. Khatri, Sarma B. K. Vrudhula
Threshold Logic in a Flash. ICCD (2019)
Ankit Wagle, Gian Singh, Jinghua Yang, Sunil P. Khatri, Sarma B. K. Vrudhula
Threshold Logic in a Flash. CoRR (2019)
Kunal Bharathi, Harsh Kumar, Abbas A. Fairouz, Ahmad Al Kawam, Sunil P. Khatri
A Plain-Text Incremental Compression (PIC) Technique with Fast Lookup Ability. ICCD (2018)
Abbas A. Fairouz, Monther Abusultan, Amr Elshennawy, Sunil P. Khatri
Comparing Leakage Reduction Techniques for an Asynchronous Network-on-Chip Router. J. Low Power Electron. 14 (3) (2018)
Andrew J. Douglass, Sunil P. Khatri
Synchronization of Ring-Based Resonant Standing Wave Oscillators for 3D Clocking Applications. ICCD (2018)
Ahmad Al Kawam, Sunil P. Khatri, Aniruddha Datta
A GPU-CPU heterogeneous algorithm for NGS read alignment. Int. J. Comput. Biol. Drug Des. 11 (1/2) (2018)
Kyle Loyka, He Zhou, Sunil P. Khatri
A Homomorphic Encryption Scheme Based on Affine Transforms. ACM Great Lakes Symposium on VLSI (2018)
Monther Abusultan, Sunil P. Khatri
Design of a Flash-based Circuit for Multi-valued Logic. ACM Great Lakes Symposium on VLSI (2017)
Kinshuk Sharma, Sunil P. Khatri
A Robust C-element Design with Enhanced Metastability Performance. ACM Great Lakes Symposium on VLSI (2017)
Ahmad Al Kawam, Sunil P. Khatri, Aniruddha Datta
A Survey of Software and Hardware Approaches to Performing Read Alignment in Next Generation Sequencing. IEEE ACM Trans. Comput. Biol. Bioinform. 14 (6) (2017)
He Zhou, Sunil P. Khatri, Jiang Hu, Frank Liu, Cliff C. N. Sze
Fast and Highly Scalable Bayesian MDP on a GPU Platform. BCB (2017)
Andrew J. Douglass, Sunil P. Khatri
Fast, Ring-Based Design of 3D Stacked DRAM. ICCD (2017)
Abbas A. Fairouz, Monther Abusultan, Sunil P. Khatri
Circuit Level Design of a Hardware Hash Unit for use in Modern Microprocessors. ACM Great Lakes Symposium on VLSI (2017)
Abbas A. Fairouz, Sunil P. Khatri
An FPGA-Based Coprocessor for Hash Unit Acceleration. ICCD (2017)
Monther Abusultan, Sunil P. Khatri
A flash-based digital circuit design flow. ICCAD (2016)
Monther Abusultan, Sunil P. Khatri
Implementing low power digital circuits using flash devices. ICCD (2016)
Monther Abusultan, Sunil P. Khatri
Exploring static and dynamic flash-based FPGA design topologies. ICCD (2016)
Laszlo B. Kish, Claes-Goran Granqvist, Sunil P. Khatri, Ferdinand Peper
Response to "Comment on 'Zero and negative energy dissipation at information-theoretic erasure'". CoRR (2016)
Monther Abusultan, Sunil P. Khatri
A Ternary-Valued, Floating Gate Transistor-Based Circuit Design Approach. ISVLSI (2016)
He Zhou, Jiang Hu, Sunil P. Khatri, Frank Liu, Cliff C. N. Sze, Mohammadmahdi R. Yousefi
GPU acceleration for Bayesian control of Markovian genetic regulatory networks. BHI (2016)
Viacheslav V. Fedorov, Monther Abusultan, Sunil P. Khatri
FTCAM: An Area-Efficient Flash-Based Ternary CAM Design. IEEE Trans. Computers 65 (8) (2016)
Venkateshwar Kottapalli, Sunil P. Khatri
A practical methodology to validate the statistical behavior of bloom filters. CODES+ISSS (2016)
Abbas A. Fairouz, Monther Abusultan, Sunil P. Khatri
A novel hardware hash unit design for modern microprocessors. ICCD (2016)
Monther Abusultan, Suman Chakravorty, Sunil P. Khatri
A GPU-based implementation of a sensor tasking methodology. FUSION (2016)
Monther Abusultan, Sunil P. Khatri
Delay, Power and Energy Tradeoffs in Deep Voltage-scaled FPGAs. ACM Great Lakes Symposium on VLSI (2015)
Laszlo B. Kish, Claes-Göran Granqvist, Sunil P. Khatri, Ferdinand Peper
Zero and negative energy dissipation at information-theoretic erasure. CoRR (2015)
Joao Marcos de Aguiar, Sunil P. Khatri
Exploring the viability of stochastic computing. ICCD (2015)
Luke Murray, Sunil P. Khatri
An Efficient Approach to Sample On-Chip Power Supplies. ACM Great Lakes Symposium on VLSI (2015)
Amr Elshennawy, Sunil P. Khatri
An asynchronous Network-on-Chip router with low standby power. ICCD (2014)
Monther Abusultan, Sunil P. Khatri
A comparison of FinFET based FPGA LUT designs. ACM Great Lakes Symposium on VLSI (2014)
Monther Abusultan, Sunil P. Khatri
Look-up Table Design for Deep Sub-threshold through Full-Supply Operation. FCCM (2014)
Monther Abusultan, Sunil P. Khatri
FPGA LUT design for wide-band dynamic voltage and frequency scaled operation (abstract only). FPGA (2014)
Kun Bian, D. M. H. Walker, Sunil P. Khatri
Techniques to Improve the Efficiency of SAT Based Path Delay Test Generation. VLSI Design (2014)
Viacheslav V. Fedorov, Monther Abusultan, Sunil P. Khatri
An area-efficient Ternary CAM design using floating gate transistors. ICCD (2014)
Rajeev Kumar, Sunil P. Khatri
Crosstalk avoidance codes for 3D VLSI. DATE (2013)
Ayan Mandal, Sunil P. Khatri, Rabi N. Mahapatra
Exploring topologies for source-synchronous ring-based network-on-chip. DATE (2013)
Pey-Chang Kent Lin, Sunil P. Khatri
Noise-based algorithms for functional equivalence and tautology checking. ICCD (2013)
Ayan Mandal, Kalyana C. Bollapalli, Nikhil Jayakumar, Sunil P. Khatri, Rabi N. Mahapatra
A low-jitter phase-locked resonant clock generation and distribution scheme. ICCD (2013)
Kun Bian, D. M. H. Walker, Sunil P. Khatri, Shayak Lahiri
Mixed structural-functional path delay test generation and compaction. DFTS (2013)
Aditya Belsare, Steve Liu, Sunil P. Khatri
GPU implementation of a scalable non-linear congruential generator for cryptography applications. ACM Great Lakes Symposium on VLSI (2013)
John F. Croix, Sunil P. Khatri, Kanupriya Gulati
Using GPUs to Accelerate CAD Algorithms. IEEE Des. Test 30 (1) (2013)
Amr Elshennawy, Craig M. Marianno, Sunil P. Khatri
Architecture and 3D device simulation of a PIN diode-based Gamma radiation detector. ACM Great Lakes Symposium on VLSI (2013)
Ayan Mandal, Sunil P. Khatri, Rabi N. Mahapatra
A source-synchronous Htree-based network-on-chip. ACM Great Lakes Symposium on VLSI (2013)
Subramanian Poothamkurissi Swaminathan, Pey-Chang Kent Lin, Sunil P. Khatri
Timing aware partitioning for multi-FPGA based logic simulation using top-down selective hierarchy flattening. ICCD (2012)
Rajeev Kumar, Ayan Mandal, Sunil P. Khatri
An efficient arithmetic Sum-of-Product (SOP) based multiplication approach for FIR filters and DFT. ICCD (2012)
Bhavitavya Bhadviya, Ayan Mandal, Sunil P. Khatri
Alleviating NBTI-induced failure in off-chip output drivers. ACM Great Lakes Symposium on VLSI (2012)
Pey-Chang Kent Lin, Ayan Mandal, Sunil P. Khatri
Boolean satisfiability using noise based logic. DAC (2012)
Ayan Mandal, Sunil P. Khatri, Rabi N. Mahapatra
Architectural simulations of a fast, source-synchronous ring-based Network-on-Chip design. ICCD (2012)
Serap A. Savari, S. M. Hossein Tabatabaei Yazdi, Navid Abedini, Sunil P. Khatri
On Optimal and Achievable Fix-Free Codes. IEEE Trans. Inf. Theory 58 (8) (2012)
Pey-Chang Kent Lin, Sunil P. Khatri
Determining gene function in boolean networks using boolean satisfiability. GENSiPS (2012)
Ayan Mandal, Sunil P. Khatri, Rabi N. Mahapatra
A fast, source-synchronous ring-based network-on-chip design. DATE (2012)
Pey-Chang Kent Lin, Sunil P. Khatri
Application of logic synthesis to the understanding and cure of genetic diseases. DAC (2012)
Didem Zeliha Turker, Sunil P. Khatri, Edgar Sánchez-Sinencio
A DCVSL Delay Cell for Fast Low Power Frequency Synthesis Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2011)
Laszlo B. Kish, Sunil P. Khatri, Sergey M. Bezrukov, Ferdinand Peper, Zoltan Gingl, Tamás Horváth
Noise-based Deterministic Logic and Computing: a Brief Survey. Int. J. Unconv. Comput. 7 (1-2) (2011)
Pey-Chang Kent Lin, Sunil P. Khatri
Efficient cancer therapy using Boolean networks and Max-SAT-based ATPG. GENSiPS (2011)
Pey-Chang Kent Lin, Alex Ivanov, Bradley Johnson, Sunil P. Khatri
A novel cryptographic key exchange scheme using resistors. ICCD (2011)
Ayan Mandal, Nikhil Jayakumar, Kalyana C. Bollapalli, Sunil P. Khatri, Rabi N. Mahapatra
An Automated Approach for Minimum Jitter Buffered H-Tree Construction. VLSI Design (2011)
Ayan Mandal, Vinay Karkala, Sunil P. Khatri, Rabi N. Mahapatra
Interconnected Tile Standing Wave Resonant Oscillator Based Clock Distribution Circuits. VLSI Design (2011)
Pey-Chang Kent Lin, Ayan Mandal, Sunil P. Khatri
Boolean Satisfiability using Noise Based Logic CoRR (2011)
Laszlo B. Kish, Sunil P. Khatri, Sergey M. Bezrukov, Ferdinand Peper, Zoltan Gingl, Tamás Horváth
Noise-based information processing: Noise-based logic and computing: what do we have so far? CoRR (2011)
Zoltan Gingl, Sunil P. Khatri, Laszlo B. Kish
Towards brain-inspired computing CoRR (2010)
Pey-Chang Kent Lin, Sunil P. Khatri
VLSI implementation of a non-linear feedback shift register for high-speed cryptography applications. ACM Great Lakes Symposium on VLSI (2010)
Rajesh Kumar, Sunil P. Khatri
An efficient pulse flip-flop based launch-on-shift scan cell. ISCAS (2010)
Laszlo B. Kish, Sunil P. Khatri, Sergey M. Bezrukov, Ferdinand Peper, Zoltan Gingl, Tamás Horváth
Noise-based deterministic logic and computing: a brief survey CoRR (2010)
Laszlo B. Kish, Sunil P. Khatri, Ferdinand Peper
Instantaneous noise-based logic CoRR (2010)
Pey-Chang Kent Lin, Sunil P. Khatri
Inference of gene predictor set using Boolean satisfiability. GENSiPS (2010)
Vinay Karkala, Joseph Wanstrath, Travis Lacour, Sunil P. Khatri
Efficient arithmetic sum-of-product (SOP) based Multiple Constant Multiplication (MCM) for FFT. ICCAD (2010)
Navid Abedini, Sunil P. Khatri, Serap A. Savari
A SAT-Based Scheme to Determine Optimal Fix-Free Codes. DCC (2010)
Kanupriya Gulati, Sunil P. Khatri
Fault Table Computation on GPUs. J. Electron. Test. 26 (2) (2010)
Kanupriya Gulati, Sunil P. Khatri
Boolean satisfiability on a graphics processor. ACM Great Lakes Symposium on VLSI (2010)
Kalyana C. Bollapalli, Sunil P. Khatri, Laszlo B. Kish
Implementing digital logic with sinusoidal supplies. DATE (2010)
Nikhil Jayakumar, Sunil P. Khatri
A Simultaneous Input Vector Control and Circuit Modification Technique to Reduce Leakage with Zero Delay Penalty. ACM Trans. Design Autom. Electr. Syst. 16 (1) (2010)
Laszlo B. Kish, Sunil P. Khatri, Tamás Horváth
Computation using Noise-based Logic: Efficient String Verification over a Slow Communication Channel CoRR (2010)
Kanupriya Gulati, Sunil P. Khatri, Peng Li
Closed-loop modeling of power and temperature profiles of FPGAs. FPGA (2009)
Vinay Karkala, Kalyana C. Bollapalli, Rajesh Garg, Sunil P. Khatri
A PLL design based on a standing wave resonant oscillator. ICCD (2009)
Kanupriya Gulati, Sunil P. Khatri
Accelerating statistical static timing analysis using graphics processing units. ASP-DAC (2009)

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Publication Activity (10 Years)

Top Topics

Top Venues

Sunil P. Khatri