Viacheslav V. Fedorov

Publication Activity (10 Years)

Years Active: 2013-2021
Publications (10 Years): 5

Top Topics

Traffic Management

Predicting Future

Top Venues

IEEE Trans. Computers

ACM Trans. Archit. Code Optim.

Publications

Abbas A. Fairouz, Monther Abusultan, Viacheslav V. Fedorov, Sunil P. Khatri
Hardware Acceleration of Hash Operations in Modern Microprocessors. IEEE Trans. Computers 70 (9) (2021)
Viacheslav V. Fedorov, Jinchun Kim, Mian Qin, Paul V. Gratz, A. L. Narasimha Reddy
Speculative paging for future NVM storage. MEMSYS (2017)
Viacheslav V. Fedorov, Monther Abusultan, Sunil P. Khatri
FTCAM: An Area-Efficient Flash-Based Ternary CAM Design. IEEE Trans. Computers 65 (8) (2016)
Jinchun Kim, Viacheslav V. Fedorov, Paul V. Gratz, A. L. Narasimha Reddy
Dynamic Memory Pressure Aware Ballooning. MEMSYS (2015)
Viacheslav V. Fedorov, A. L. Narasimha Reddy, Paul V. Gratz
Shared Last-Level Caches and The Case for Longer Timeslices. MEMSYS (2015)
Viacheslav V. Fedorov, Monther Abusultan, Sunil P. Khatri
An area-efficient Ternary CAM design using floating gate transistors. ICCD (2014)
Viacheslav V. Fedorov, Sheng Qiu, A. L. Narasimha Reddy, Paul V. Gratz
ARI: Adaptive LLC-memory traffic management. ACM Trans. Archit. Code Optim. 10 (4) (2013)