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Behzad Zeinali
ORCID
Publication Activity (10 Years)
Years Active: 2011-2019
Publications (10 Years): 7
Top Topics
Cmos Technology
Random Access Memory
Power Consumption
Verilog Hdl
Top Venues
IEEE Trans. Circuits Syst. II Express Briefs
CoRR
ICCD
Int. J. Circuit Theory Appl.
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Publications
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Behzad Zeinali
,
Jens Kargaard Madsen
,
Praveen Raghavan
,
Farshad Moradi
A Novel Nondestructive Bit-Line Discharging Scheme for Deep Submicrometer STT-RAMs.
IEEE Trans. Emerg. Top. Comput.
7 (2) (2019)
Farshad Moradi
,
Hooman Farkhani
,
Behzad Zeinali
,
Hamdam Ghanatian
,
Johan Michel Alain Pelloux-Prayer
,
Tim Böhnert
,
Mohammad Zahedinejad
,
Hadi Heidari
,
Vahid Nabaei
,
Ricardo Ferreira
,
Johan Åkerman
,
Jens Kargaard Madsen
Spin-Orbit-Torque-based Devices, Circuits and Architectures.
CoRR
(2019)
Behzad Zeinali
,
Dimitrios Karsinos
,
Farshad Moradi
Progressive Scaled STT-RAM for Approximate Computing in Multimedia Applications.
IEEE Trans. Circuits Syst. II Express Briefs
(7) (2018)
Leila Bagheriye
,
Siroos Toofan
,
Roghayeh Saeidi
,
Behzad Zeinali
,
Farshad Moradi
A Reduced Store/Restore Energy MRAM-Based SRAM Cell for a Non-Volatile Dynamically Reconfigurable FPGA.
IEEE Trans. Circuits Syst. II Express Briefs
(11) (2018)
Behzad Zeinali
,
Jens Kargaard Madsen
,
Praveen Raghavan
,
Farshad Moradi
Ultra-Fast SOT-MRAM Cell with STT Current for Deterministic Switching.
ICCD
(2017)
Behzad Zeinali
,
Jens Kargaard Madsen
,
Praveen Raghavan
,
Farshad Moradi
Low-leakage sub-threshold 9 T-SRAM cell in 14-nm FinFET technology.
Int. J. Circuit Theory Appl.
45 (11) (2017)
Behzad Zeinali
,
Mahsa Esmaeili
,
Jens Kargaard Madsen
,
Farshad Moradi
Multilevel SOT-MRAM cell with a novel sensing scheme for high-density memory applications.
ESSDERC
(2017)
Behzad Zeinali
,
Jens Kargaard Madsen
,
Praveen Raghavan
,
Farshad Moradi
Sub-Threshold SRAM Design in 14 Nm FinFET Technology with Improved Access Time and Leakage Power.
ISVLSI
(2015)
Behzad Zeinali
,
Tohid Moosazadeh
,
Mohammad Yavari
,
Ángel Rodríguez-Vázquez
Equalization-Based Digital Background Calibration Technique for Pipelined ADCs.
IEEE Trans. Very Large Scale Integr. Syst.
22 (2) (2014)
Farshad Moradi
,
Mohammad Tohidi
,
Behzad Zeinali
,
Jens Kargaard Madsen
8T-SRAM Cell with Improved Read and Write Margins in 65 nm CMOS Technology.
VLSI-SoC (Selected Papers)
(2014)
Behzad Zeinali
,
Mohammad Yavari
A new digital background correction algorithm with non-precision calibration signals for pipelined ADCs.
ICECS
(2011)