Kuba Raczkowski

Publication Activity (10 Years)

Years Active: 2009-2018
Publications (10 Years): 4

Top Topics

Metal Oxide Semiconductor

Sampling Algorithm

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Masato Osawa, S. Hiraide, S. Suzuki, H. Kato, Kosei Tamiya, Yasunari Harada, Kuba Raczkowski, J. L. Bacq, Peter Van Wesemael, M. Liu, Annachiara Spagnolo, K. De Munck, S. Guerrieri, Jonathan Borremans
An Adaptive Frame Image Sensor with Fine-Grained Power Management for Ultra-Low Power Internet of Things Application. ESSCIRC (2018)
Nereo Markulic, Kuba Raczkowski, Ewout Martens, Pedro Emiliano Paro Filho, Benjamin P. Hershberg, Piet Wambacq, Jan Craninckx
A DTC-Based Subsampling PLL Capable of Self-Calibrated Fractional Synthesis and Two-Point Modulation. IEEE J. Solid State Circuits 51 (12) (2016)
Nereo Markulic, Kuba Raczkowski, Piet Wambacq, Jan Craninckx
A Fractional-n subsampling PLL based on a digital-to-time converter. MIPRO (2016)
Nereo Markulic, Kuba Raczkowski, Ewout Martens, Pedro Emiliano Paro Filho, Benjamin P. Hershberg, Piet Wambacq, Jan Craninckx
9.7 A self-calibrated 10Mb/s phase modulator with -37.4dB EVM based on a 10.1-to-12.4GHz, -246.6dB-FOM, fractional-N subsampling PLL. ISSCC (2016)
Barend van Liempd, Benjamin P. Hershberg, Kuba Raczkowski, Saneaki Ariumi, Udo Karthaus, Karl-Frederik Bink, Jan Craninckx
2.2 A +70dBm IIP3 single-ended electrical-balance duplexer in 0.18um SOI CMOS. ISSCC (2015)
Kuba Raczkowski, Nereo Markulic, Benjamin P. Hershberg, Jan Craninckx
A 9.2-12.7 GHz Wideband Fractional-N Subsampling PLL in 28 nm CMOS With 280 fs RMS Jitter. IEEE J. Solid State Circuits 50 (5) (2015)
Viki Szortyka, Kuba Raczkowski, Maarten Kuijk, Piet Wambacq
A Wideband Beamforming Lowpass Filter for 60 GHz Phased-Array Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2015)
Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk, Piet Wambacq
A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS. IEEE J. Solid State Circuits 50 (9) (2015)
Mark Ingels, Xiaoqiang Zhang, Kuba Raczkowski, Sungwoo Cha, Pieter Palmers, Jan Craninckx
A linear 28nm CMOS digital transmitter with 2×12bit up to LO baseband sampling and -58dBc C-IM3. ESSCIRC (2014)
Benjamin P. Hershberg, Kuba Raczkowski, Kristof Vaesen, Jan Craninckx
A 9.1-12.7 GHz VCO in 28nm CMOS with a bottom-pinning bias technique for digital varactor stress reduction. ESSCIRC (2014)
Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk, Piet Wambacq
21.4 A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS. ISSCC (2014)
Nereo Markulic, Kuba Raczkowski, Piet Wambacq, Jan Craninckx
A 10-bit, 550-fs step Digital-to-Time Converter in 28nm CMOS. ESSCIRC (2014)
Vojkan Vidojkovic, Viki Szortyka, Khaled Khalaf, Giovanni Mangraviti, Bertrand Parvais, Kristof Vaesen, Steven Brebels, Annachiara Spagnolo, Michael Libois, John R. Long, Kuba Raczkowski, Praveen Raghavan, André Bourdoux, Min Li, Charlotte Soens, Vito Giannini, Piet Wambacq
CMOS low-power transceivers for 60GHz multi Gbit/s communications. CICC (2013)
Kuba Raczkowski, Walter De Raedt, Bart Nauwelaers, Piet Wambacq
A wideband beamformer for a phased-array 60GHz receiver in 40nm digital CMOS. ISSCC (2010)
Kuba Raczkowski, Steven Thijs, Walter De Raedt, Bart Nauwelaers, Piet Wambacq
50-to-67GHz ESD-protected power amplifiers in digital 45nm LP CMOS. ISSCC (2009)
Jonathan Borremans, Kuba Raczkowski, Piet Wambacq
A digitally controlled compact 57-to-66GHz front-end in 45nm digital CMOS. ISSCC (2009)