Jonathan Borremans

Publication Activity (10 Years)

Years Active: 2006-2018
Publications (10 Years): 2

Top Topics

Delay Insensitive

Preprocessing Phase

Top Venues

Publications

Lin-Kun Wu, David San Segundo Bello, Philippe Coppejans, Jan Craninckx, Andreas Süss, Maarten Rosmeulen, Piet Wambacq, Jonathan Borremans
Analysis and Design of a CMOS Ultra-High-Speed Burst Mode Imager with In-Situ Storage Topology Featuring In-Pixel CDS Amplification. Sensors 18 (11) (2018)
Masato Osawa, S. Hiraide, S. Suzuki, H. Kato, Kosei Tamiya, Yasunari Harada, Kuba Raczkowski, J. L. Bacq, Peter Van Wesemael, M. Liu, Annachiara Spagnolo, K. De Munck, S. Guerrieri, Jonathan Borremans
An Adaptive Frame Image Sensor with Fine-Grained Power Management for Ultra-Low Power Internet of Things Application. ESSCIRC (2018)
Bahman Yousefzadeh, Ugur Sonmez, Nandish Mehta, Jonathan Borremans, Michiel A. P. Pertijs, Kofi A. A. Makinwa
A generic read-out circuit for resistive transducers. IWASI (2015)
Barend van Liempd, Jonathan Borremans, Ewout Martens, Sungwoo Cha, Hans Suys, Bob Verbruggen, Jan Craninckx
A 0.9 V 0.4-6 GHz Harmonic Recombination SDR Receiver in 28 nm CMOS With HR3/HR5 and IIP2 Calibration. IEEE J. Solid State Circuits 49 (8) (2014)
Barend van Liempd, Jonathan Borremans, Sungwoo Cha, Ewout Martens, Hans Suys, Jan Craninckx
IIP2 and HR calibration for an 8-phase harmonic recombination receiver in 28nm. CICC (2013)
Chunshu Li, Min Li, Marian Verhelst, André Bourdoux, Jonathan Borremans, Sofie Pollin, Alessandro Chiumento, Liesbet Van der Perre, Rudy Lauwereins
A Generic Framework for Optimizing Digital Intensive Harmonic Rejection Receivers. SiPS (2012)
Jonathan Borremans, Gunjan Mandal, Vito Giannini, Björn Debaillie, Mark Ingels, Tomohiro Sano, Bob Verbruggen, Jan Craninckx
A 40 nm CMOS 0.4-6 GHz Receiver Resilient to Out-of-Band Blockers. IEEE J. Solid State Circuits 46 (7) (2011)
Kameswaran Vengattaramane, Jonathan Borremans, Michiel Steyaert, Jan Craninckx
A standard cell based all-digital Time-to-Digital Converter with reconfigurable resolution and on-line background calibration. ESSCIRC (2011)
Jonathan Borremans, Gunjan Mandal, Vito Giannini, Tomohiro Sano, Mark Ingels, Bob Verbruggen, Jan Craninckx
A 40nm CMOS highly linear 0.4-to-6GHz receiver resilient to 0dBm out-of-band blockers. ISSCC (2011)
Jan Craninckx, Jonathan Borremans, Mark Ingels
SAW-less software-defined radio transceivers in 40nm CMOS. CICC (2011)
Vito Giannini, Mark Ingels, Tomohiro Sano, Björn Debaillie, Jonathan Borremans, Jan Craninckx
A multiband LTE SAW-less modulator with -160dBc/Hz RX-band noise in 40nm LP CMOS. ISSCC (2011)
Jonathan Borremans, Gunjan Mandal, Björn Debaillie, Vito Giannini, Jan Craninckx
A sub-3dB NF voltage-sampling front-end with +18dBm IIP3 and +2dBm blocker compression point. ESSCIRC (2010)
Mark Ingels, Vito Giannini, Jonathan Borremans, Gunjan Mandal, Björn Debaillie, Peter Van Wesemael, Tomohiro Sano, Takaya Yamamoto, Dries Hauspie, Joris Van Driessche, Jan Craninckx
40 nm LP CMOS Transceiver for a Software-Defined Radio Platform. IEEE J. Solid State Circuits 45 (12) (2010)
Mark Ingels, Vito Giannini, Jonathan Borremans, Gunjan Mandal, Björn Debaillie, Peter Van Wesemael, Tomohiro Sano, Takaya Yamamoto, Dries Hauspie, Joris Van Driessche, Jan Craninckx
40nm LP CMOS 0.1-to-3GHz multistandard transceiver. ISSCC (2010)
Jonathan Borremans, Kameswaran Vengattaramane, Kameswaran Giannini, Jan Craninckx
A 86MHz-to-12GHz digital-intensive phase-modulated fractional-N PLL using a 15pJ/Shot 5ps TDC in 40nm digital CMOS. ISSCC (2010)
Jonathan Borremans, Kameswaran Vengattaramane, Vito Giannini, Björn Debaillie, Wim Van Thillo, Jan Craninckx
A 86 MHz-12 GHz Digital-Intensive PLL for Software-Defined Radios, Using a 6 fJ/Step TDC in 40 nm Digital CMOS. IEEE J. Solid State Circuits 45 (10) (2010)
Jonathan Borremans, Steven Thijs, Morin Dehan, Abdelkarim Mercha, Piet Wambacq
Low-cost feedback-enabled LNAs in 45nm CMOS. ESSCIRC (2009)
Dimitri Linten, Steven Thijs, Jonathan Borremans, Morin Dehan, David Trémouilles, Mirko Scholz, M. I. Natarajan, Piet Wambacq, Stefaan Decoutere, Guido Groeseneken
A plug-and-play wideband RF circuit ESD protection methodology: T-diodes. Microelectron. Reliab. 49 (12) (2009)
Julien Ryckaert, Jonathan Borremans, Bob Verbruggen, Lynn Bos, Costantino Armiento, Jan Craninckx, Geert Van der Plas
A 2.4 GHz Low-Power Sixth-Order RF Bandpass ΔΣ Converter in CMOS. IEEE J. Solid State Circuits 44 (11) (2009)
Jonathan Borremans, Kuba Raczkowski, Piet Wambacq
A digitally controlled compact 57-to-66GHz front-end in 45nm digital CMOS. ISSCC (2009)
Jonathan Borremans, Steven Thijs, Piet Wambacq, Yves Rolain, Dimitri Linten, Maarten Kuijk
A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA. IEEE J. Solid State Circuits 44 (2) (2009)
Jonathan Borremans, Julien Ryckaert, Claude Desset, Maarten Kuijk, Piet Wambacq, Jan Craninckx
A Low-Complexity, Low-Phase-Noise, Low-Voltage Phase-Aligned Ring Oscillator in 90 nm Digital CMOS. IEEE J. Solid State Circuits 44 (7) (2009)
Vito Giannini, Pierluigi Nuzzo, Charlotte Soens, Kameswaran Vengattaramane, Julien Ryckaert, Michaël Goffioul, Björn Debaillie, Jonathan Borremans, Joris Van Driessche, Jan Craninckx, Mark Ingels
0.1-5 GHz Software-Defined Radio Receiver in 45-nm Digital CMOS. IEEE J. Solid State Circuits 44 (12) (2009)
Jonathan Borremans, Julien Ryckaert, Piet Wambacq, Maarten Kuijk, Jan Craninckx
A low-complexity, low phase noise, low-voltage phase-aligned ring oscillator in 90 nm digital CMOS. ESSCIRC (2008)
Karen Scheir, Stephane Bronckers, Jonathan Borremans, Piet Wambacq, Yves Rolain
A 52GHz Phased-Array Receiver Front-End in 90nm Digital CMOS. ISSCC (2008)
Jonathan Borremans, Piet Wambacq, Maarten Kuijk, Geert Carchon, Stefaan Decoutere
A 400 μW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS. ISSCC (2008)
Jonathan Borremans, Andrea Bevilacqua, Stephane Bronckers, Morin Dehan, Maarten Kuijk, Piet Wambacq, Jan Craninckx
A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS. IEEE J. Solid State Circuits 43 (12) (2008)
Karen Scheir, Stephane Bronckers, Jonathan Borremans, Piet Wambacq, Yves Rolain
A 52 GHz Phased-Array Receiver Front-End in 90 nm Digital CMOS. IEEE J. Solid State Circuits 43 (12) (2008)
Steven Thijs, Mototsugu Okushima, Jonathan Borremans, Philippe Jansen, Dimitri Linten, Mirko Scholz, Piet Wambacq, Guido Groeseneken
Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications. CICC (2008)
Jonathan Borremans, Stephane Bronckers, Piet Wambacq, Maarten Kuijk, Jan Craninckx
5.6GHz Multi-Band Front-End in 90nm Digital CMOS. ISSCC (2008)
Piet Wambacq, Abdelkarim Mercha, Karen Scheir, Bob Verbruggen, Jonathan Borremans, Vincent De Heyn, Steven Thijs, Dimitri Linten, Geert Van der Plas, Bertrand Parvais, Morin Dehan, Stefaan Decoutere, Charlotte Soens, Nadine Collaert, Malgorzata Jurczak
Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies. ISSCC (2008)
Jonathan Borremans, Piet Wambacq, Charlotte Soens, Yves Rolain, Maarten Kuijk
Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS. IEEE J. Solid State Circuits 43 (11) (2008)
Jonathan Borremans, Piet Wambacq, Dimitri Linten
An ESD-Protected DC-to-6GHz 9.7mW LNA in 90nm Digital CMOS. ISSCC (2007)
Jonathan Borremans, Piet Wambacq, Geert Van der Plas, Yves Rolain, Maarten Kuijk
A switchable low-area 2.4-and-5 GHz dual-band LNA in digital CMOS. ESSCIRC (2007)
Piet Wambacq, Bob Verbruggen, Karen Scheir, Jonathan Borremans, Morin Dehan, Dimitri Linten, Vincent De Heyn, Geert Van der Plas, Abdelkarim Mercha, Bertrand Parvais, Cedric Gustin, Vaidyanathan Subramanian, Nadine Collaert, Malgorzata Jurczak, Stefaan Decoutere
The Potential of FinFETs for Analog and RF Circuit Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2007)
Jonathan Borremans, Ludwig De Locht, Piet Wambacq, Yves Rolain
Nonlinearity analysis of Analog/RF circuits using combined multisine and volterra analysis. DATE (2007)
Stefaan Decoutere, Piet Wambacq, Vaidy Subramanian, Jonathan Borremans, Abdelkarim Mercha
Technologies for (sub-) 45nm Analog/RF CMOS - Circuit Design Opportunities and Challenges. CICC (2006)