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A 0.9 V 0.4-6 GHz Harmonic Recombination SDR Receiver in 28 nm CMOS With HR3/HR5 and IIP2 Calibration.

Barend van LiempdJonathan BorremansEwout MartensSungwoo ChaHans SuysBob VerbruggenJan Craninckx
Published in: IEEE J. Solid State Circuits (2014)
Keyphrases
  • high speed
  • low resolution
  • high resolution
  • low cost
  • camera calibration
  • power consumption
  • power supply