Maarten Kuijk

Publication Activity (10 Years)

Years Active: 2000-2022
Publications (10 Years): 5

Top Topics

Clock Frequency

Sampling Algorithm

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Gobinath Jegannathan, Volodymyr Seliuchenko, Thomas Van den Dries, Thomas Lapauw, Sven Boulanger, Hans Ingelberts, Maarten Kuijk
Correction: Jegannathan et al. An Overview of CMOS Photodetectors Utilizing Current-Assistance for Swift and Efficient Photo-Carrier Detection. Sensors 2021, 21, 4576. Sensors 22 (7) (2022)
Gobinath Jegannathan, Volodymyr Seliuchenko, Thomas Van den Dries, Thomas Lapauw, Sven Boulanger, Hans Ingelberts, Maarten Kuijk
An Overview of CMOS Photodetectors Utilizing Current-Assistance for Swift and Efficient Photo-Carrier Detection. Sensors 21 (13) (2021)
Gobinath Jegannathan, Thomas Van den Dries, Maarten Kuijk
Current-Assisted SPAD with Improved p-n Junction and Enhanced NIR Performance. Sensors 20 (24) (2020)
Thomas Van den Dries, Hans Ingelberts, Sven Boulanger, Maarten Kuijk
A 5 ps resolution, 8.6 ns delay range digital delay line using combinatorial redundancy. PRIME (2019)
Volodymyr Seliuchenko, Sharath Patil, Marcelo Mizuki, Saad Ahmad, Maarten Kuijk
Partial reset HDR image sensor with improved fixed pattern noise performance. IMSE (2018)
Viki Szortyka, Kuba Raczkowski, Maarten Kuijk, Piet Wambacq
A Wideband Beamforming Lowpass Filter for 60 GHz Phased-Array Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2015)
Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk, Piet Wambacq
A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS. IEEE J. Solid State Circuits 50 (9) (2015)
Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk, Piet Wambacq
21.4 A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS. ISSCC (2014)
Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas
A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS. IEEE J. Solid State Circuits 45 (10) (2010)
Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas
A 2.6mW 6b 2.2GS/s 4-times interleaved fully dynamic pipelined ADC in 40nm digital CMOS. ISSCC (2010)
Ahmed Mohamed AbdelHamid, Ankur Anchlia, Stylianos Mamagkakis, Miguel Corbalan Miranda, Bart Dierickx, Maarten Kuijk
A Standardized Knobs and Monitors RTL2RTL Insertion Methodology for Fine Grain SoC Tuning. DSD (2009)
Jonathan Borremans, Steven Thijs, Piet Wambacq, Yves Rolain, Dimitri Linten, Maarten Kuijk
A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA. IEEE J. Solid State Circuits 44 (2) (2009)
Jonathan Borremans, Julien Ryckaert, Claude Desset, Maarten Kuijk, Piet Wambacq, Jan Craninckx
A Low-Complexity, Low-Phase-Noise, Low-Voltage Phase-Aligned Ring Oscillator in 90 nm Digital CMOS. IEEE J. Solid State Circuits 44 (7) (2009)
Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas
A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS. IEEE J. Solid State Circuits 44 (3) (2009)
Jonathan Borremans, Julien Ryckaert, Piet Wambacq, Maarten Kuijk, Jan Craninckx
A low-complexity, low phase noise, low-voltage phase-aligned ring oscillator in 90 nm digital CMOS. ESSCIRC (2008)
Jonathan Borremans, Piet Wambacq, Maarten Kuijk, Geert Carchon, Stefaan Decoutere
A 400 μW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS. ISSCC (2008)
Jonathan Borremans, Andrea Bevilacqua, Stephane Bronckers, Morin Dehan, Maarten Kuijk, Piet Wambacq, Jan Craninckx
A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS. IEEE J. Solid State Circuits 43 (12) (2008)
Daniel Van Nieuwenhove, Ward van der Tempel, Riemer Grootjans, Maarten Kuijk
Time-Of-Flight distance sensor with enhanced dynamic range. Int. J. Intell. Syst. Technol. Appl. 5 (3/4) (2008)
Jonathan Borremans, Stephane Bronckers, Piet Wambacq, Maarten Kuijk, Jan Craninckx
5.6GHz Multi-Band Front-End in 90nm Digital CMOS. ISSCC (2008)
Ward van der Tempel, Daniel Van Nieuwenhove, Riemer Grootjans, Maarten Kuijk
A 1 × 64 Complementary Metal Oxide Semiconductor ranging sensor based on Current-Assisted Photonic Demodulators. Int. J. Intell. Syst. Technol. Appl. 5 (3/4) (2008)
Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas
A 2.2mW 5b 1.75GS/s Folding Flash ADC in 90nm Digital CMOS. ISSCC (2008)
Jonathan Borremans, Piet Wambacq, Charlotte Soens, Yves Rolain, Maarten Kuijk
Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS. IEEE J. Solid State Circuits 43 (11) (2008)
Jonathan Borremans, Piet Wambacq, Geert Van der Plas, Yves Rolain, Maarten Kuijk
A switchable low-area 2.4-and-5 GHz dual-band LNA in digital CMOS. ESSCIRC (2007)
J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt, Bart Nauwelaers, Eric Beyne
Constant impedance scaling paradigm for interconnect synthesis. SLIP (2006)
J. Balachandran, Maarten Kuijk, Steven Brebels, Geert Carchon, Walter De Raedt, Bart Nauwelaers, Eric Beyne
Efficient Link Architecture for On-Chip Serial links and Networks. SoC (2006)
Charlotte Soens, Geert Van der Plas, Mustafa Badaroglu, Piet Wambacq, Stéphane Donnay, Yves Rolain, Maarten Kuijk
Modeling of Substrate Noise Generation, Isolation, and Impact for an LC-VCO and a Digital Modem on a Lightly-Doped Substrate. IEEE J. Solid State Circuits 41 (9) (2006)
J. Balachandran, Steven Brebels, Geert Carchon, Walter De Raedt, Eric Beyne, Maarten Kuijk, Bart Nauwelaers
Constant Impedance Scaling Paradigm for Scaling LC transmission lines. ISQED (2006)
J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt, Bart Nauwelaers, Eric Beyne
Wafer-level package interconnect options. IEEE Trans. Very Large Scale Integr. Syst. 14 (6) (2006)
Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Maarten Kuijk
Performance degradation of LC-tank VCOs by impact of digital switching noise in lightly doped substrates. IEEE J. Solid State Circuits 40 (7) (2005)
Xavier Maillard, Maarten Kuijk
An 8-Gb/s capacitively coupled receiver with high common-mode rejection for uncoded data. IEEE J. Solid State Circuits 39 (11) (2004)
Xavier Maillard, Frédéric Devisch, Maarten Kuijk
A 900-Mb/s CMOS data recovery DLL using half-frequency clock. IEEE J. Solid State Circuits 37 (6) (2002)
Cathleen Rooman, Daniël Coppée, Maarten Kuijk
Asynchronous 250-Mb/s optical receivers with integrated detector in standard CMOS technology for optocoupler applications. IEEE J. Solid State Circuits 35 (7) (2000)
Frédéric Devisch, Johan Stiens, Roger Vounckx, Maarten Kuijk
A power reduction method for off-chip interconnects. ISCAS (2000)