A power reduction method for off-chip interconnects.

Frédéric Devisch Johan Stiens Roger Vounckx Maarten Kuijk

Published in: ISCAS (2000)

Keyphrases

reduction method
power dissipation
power consumption
chip design
selection algorithm
ibm power processor
cmos technology
low power
high speed
input output
low cost
multithreading
data sets
digital signal processing
power management
high dimensional
database systems
artificial intelligence
machine learning