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NBTI Aging on 32-Bit Adders in the Downscaling Planar FET Technology Nodes.

Halil KuknerPieter WeckxSebastien MorrisonPraveen RaghavanBen KaczerFrancky CatthoorLiesbet Van der PerreRudy LauwereinsGuido Groeseneken
Published in: DSD (2014)
Keyphrases
  • rapid development
  • bit parallel
  • case study
  • data processing
  • shortest path
  • key technologies
  • neural network
  • cost effective
  • network structure
  • directed graph
  • ground plane
  • planar graphs