Sreejit Chakravarty

Publication Activity (10 Years)

Years Active: 1986-2023
Publications (10 Years): 16

Top Venues

VTS

Swarm Evol. Comput.

3DIC

IEEE Des. Test

Publications

Po-Yao Chuang, Francesco Lorenzelli, Sreejit Chakravarty, Cheng-Wen Wu, Georges G. E. Gielen, Erik Jan Marinissen
Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects in Chiplet-Based Multi-Die Packages. VTS (2023)
Po-Yao Chuang, Francesco Lorenzelli, Sreejit Chakravarty, Slimane Boutobza, Cheng-Wen Wu, Georges G. E. Gielen, Erik Jan Marinissen
Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages. 3DIC (2023)
Adit D. Singh, Sreejit Chakravarty, George Papadimitriou, Dimitris Gizopoulos
Silent Data Errors: Sources, Detection, and Modeling. VTS (2023)
Bapi Vinnakota, Jaber Derakhshandeh, Eric Beyne, Erik Jan Marinissen, Sreejit Chakravarty
IP Session on Chiplet: Design, Assembly, and Test. VTS (2023)
Sreejit Chakravarty
Special Session: A Call to Standardize Chip-let Interconnect Testing. VTS (2022)
Sreejit Chakravarty, Fei Su, Indira A. Gohad, Sudheer V. Bandana, B. S. Adithya, Wei Ming Lim
Internal I/O Testing: Definition and a Solution. VTS (2020)
Sourav Das, Fei Su, Sreejit Chakravarty
Testing of Prebond Through Silicon Vias. IEEE Des. Test 37 (4) (2020)
Sourav Das, Fei Su, Sreejit Chakravarty
A Comparative Study of Pre-bond TSV Test Methodologies. VTS (2019)
Anandh Krishnan, John van Gelder, Mayukh Bhattacharya, Sreejit Chakravarty, Prashant Goteti
Innovative practices on functional testing and fault simulation for FuSa. VTS (2018)
Sourav Das, Fei Su, Sreejit Chakravarty
A PVT-Resilient No-Touch DFT Methodology for Prebond TSV Testing. ITC (2018)
M. Casarsa, Gurgen Harutyunyan, Kaitlyn Chen, Ramesh Sharma, Giri Podichetty, Martin Keim, Sreejit Chakravarty, Ramesh C. Tekumalla
Innovative practices on memory test practice. VTS (2018)
Prashant Goteti, Sreejit Chakravarty
Innovative practices session 6C DFT for functional safety. VTS (2017)
P. Mohapatra, Sreejit Chakravarty, P. K. Dash
Microarray medical data classification using kernel ridge regression and modified cat swarm optimization based gene selection system. Swarm Evol. Comput. 28 (2016)
Sreejit Chakravarty, P. Mohapatra, Pradipta Kishore Dash
Evolutionary extreme learning machine for energy price forecasting. Int. J. Knowl. Based Intell. Eng. Syst. 20 (2) (2016)
Sreejit Chakravarty, Ranjeeta Bisoi, P. K. Dash
A Hybrid Kernel Extreme Learning Machine and Improved Cat Swarm Optimization for Microarray Medical Data Classification. Int. J. Appl. Evol. Comput. 7 (3) (2016)
P. Mohapatra, Sreejit Chakravarty, Pradipta K. Dash
An improved cuckoo search based extreme learning machine for medical data classification. Swarm Evol. Comput. 24 (2015)
Fan Yang, Sreejit Chakravarty, Arun Gunda, Nicole Wu, Jianyu Ning
Silicon Evaluation of Cell-Aware ATPG Tests and Small Delay Tests. ATS (2014)
Charutosh Dixit, Ramesh C. Tekumalla, Sreejit Chakravarty, Manuel d'Abreu, Zhuoyu Bao, Concetta Riccobene
Innovative practices session 2C: Memory test. VTS (2013)
Wei Zhao, Junxia Ma, Mohammad Tehranipoor, Sreejit Chakravarty
Power-safe application of tdf patterns to flip-chip designs during wafer test. ACM Trans. Design Autom. Electr. Syst. 18 (3) (2013)
Sreejit Chakravarty, Pradipta K. Dash
Evolutionary functional link interval type-2 fuzzy neural system for exchange rate prediction. Int. J. Data Min. Model. Manag. 4 (4) (2012)
Hassan Salmani, Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty, Patrick Girard, Xiaoqing Wen
Layout-Aware Pattern Evaluation and Analysis for Power-Safe Application of Transition Delay Fault Patterns. J. Low Power Electron. 8 (2) (2012)
Wei Zhao, Sreejit Chakravarty, Junxia Ma, Narendra Devta-Prasanna, Fan Yang, Mohammad Tehranipoor
A novel method for fast identification of peak current during test. VTS (2012)
Sreejit Chakravarty, Narendra Devta-Prasanna, Arun Gunda, Junxia Ma, Fan Yang, H. Guo, R. Lai, D. Li
Silicon evaluation of faster than at-speed transition delay tests. VTS (2012)
Sreejit Chakravarty, Pradipta K. Dash
A PSO based integrated functional link net and interval type-2 fuzzy logic system for predicting stock market indices. Appl. Soft Comput. 12 (2) (2012)
Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty
Ensuring Power-Safe Application of Test Patterns Using an Effective Gating Approach Considering Current Limits. J. Low Power Electron. 8 (2) (2012)
Sreejit Chakravarty, Binh Dang, Darcy Escovedo, A. J. Haas
Optimal manufacturing flow to determine minumum operating voltage. ITC (2011)
Sreejit Chakravarty
A Process Monitor Based Speed Binning and Die Matching Algorithm. Asian Test Symposium (2011)
Sreejit Chakravarty, Pradipta K. Dash
Dynamic filter weights neural network model integrated with differential evolution for day-ahead price forecasting in energy market. Expert Syst. Appl. 38 (9) (2011)
Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty
Power-safe test application using an effective gating approach considering current limits. VTS (2011)
Sreejit Chakravarty, Pradipta K. Dash, V. Ravikumar Pandi, Bijaya K. Panigrahi
An Evolutionary Functional Link Neural Fuzzy Model for Financial Time Series Forecasting. Int. J. Appl. Evol. Comput. 2 (3) (2011)
Sean H. Wu, Sreejit Chakravarty, Li-C. Wang
Impact of multiple input switching on delay test under process variation. VTS (2010)
Fan Yang, Sreejit Chakravarty
Testing of latch based embedded arrays using scan tests. ITC (2010)
Wei Zhao, Junxia Ma, Mohammad Tehranipoor, Sreejit Chakravarty
Power-Safe Application of Transition Delay Fault Patterns Considering Current Limit during Wafer Test. Asian Test Symposium (2010)
Amit Mishra, Nidhi Sinha, Satdev, Virendra Singh, Sreejit Chakravarty, Adit D. Singh
Modified Scan Flip-Flop for Low Power Testing. Asian Test Symposium (2010)
Sreejit Chakravarty
Special session 11C: Hot topic design consideration and silicon evaluation of on-chip monitors. VTS (2010)
Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
Improving the Detectability of Resistive Open Faults in Scan Cells. DFT (2009)
Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
Detectability of internal bridging faults in scan chains. ASP-DAC (2009)
Sreejit Chakravarty, Pradipta K. Dash
Forecasting Stock Market Indices using Hybrid Network. NaBIC (2009)
Nicholas Callegari, Pouria Bastani, Li-C. Wang, Sreejit Chakravarty, Alexander Tetelbaum
Path selection for monitoring unexpected systematic timing effects. ASP-DAC (2009)
Loganathan Lingappan, Vijay Gangaram, Niraj K. Jha, Sreejit Chakravarty
Fast Enhancement of Validation Test Sets for Improving the Stuck-at Fault Coverage of RTL Circuits. IEEE Trans. Very Large Scale Integr. Syst. 17 (5) (2009)
I-De Huang, Yi-Shing Chang, Sandeep K. Gupta, Sreejit Chakravarty
An Industrial Case Study of Sticky Path-Delay Faults. VTS (2008)
Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
An Enhanced Logic BIST Architecture for Online Testing. IOLTS (2008)
Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
On the Detectability of Scan Chain Internal Faults - An Industrial Case Study. VTS (2008)
Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
Detection of Internal Stuck-open Faults in Scan Chains. ITC (2008)
Sean H. Wu, Sreejit Chakravarty, Alexander Tetelbaum, Li-C. Wang
Refining Delay Test Methodology Using Knowledge of Asymmetric Transition Delay. ATS (2008)
Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
Detection of Transistor Stuck-Open Faults in Asynchronous Inputs of Scan Cells. DFT (2008)
Abhijit Jas, Yi-Shing Chang, Sreejit Chakravarty
A Methodology for Handling Complex Functional Constraints for Large Industrial Designs. J. Electron. Test. 24 (1-3) (2008)
Manan Syal, Kameshwar Chandrasekar, Vishnu C. Vimjam, Michael S. Hsiao, Yi-Shing Chang, Sreejit Chakravarty
A Study of Implication Based Pseudo Functional Testing. ITC (2006)
Mahilchi Milir Vaseekar Kumar, Spyros Tragoudas, Sreejit Chakravarty, Rathish Jayabharathi
Exact At-speed Delay Fault Grading in Sequential Circuits. ITC (2006)
Eric N. Tran, Vishwashanth Kasulasrinivas, Sreejit Chakravarty
Silicon Evaluation of Logic Proximity Bridge Patterns. VTS (2006)
Abhijit Jas, Yi-Shing Chang, Sreejit Chakravarty
An Approach to Minimizing Functional Constraints. DFT (2006)
Mahilchi Milir Vaseekar Kumar, Spyros Tragoudas, Sreejit Chakravarty, Rathish Jayabharathi
Exact Delay Fault Coverage in Sequential Logic Under Any Delay Fault Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (12) (2006)
Suriyaprakash Natarajan, Srinivas Patil, Sreejit Chakravarty
Path Delay Fault Simulation on Large Industrial Designs. VTS (2006)
Sreejit Chakravarty, Yi-Shing Chang, Hiep Hoang, Sridhar Jayaraman, Silvio Picano, Cheryl Prunty, Eric W. Savage, Rehan Sheikh, Eric N. Tran, Khen Wee
Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor. VTS (2005)
Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
Efficient techniques for transition testing. ACM Trans. Design Autom. Electr. Syst. 10 (2) (2005)
Eric N. Tran, Vamsee Krishna, Sujit T. Zachariah, Sreejit Chakravarty
Logic proximity bridges. ITC (2005)
Sreejit Chakravarty
Improving Logic Test Quality of Microprocessors. Asian Test Symposium (2005)
Mahilchi Milir Vaseekar Kumar, Spyros Tragoudas, Sreejit Chakravarty, Rathish Jayabharathi
Implicit and Exact Path Delay Fault Grading in Sequential Circuits. DATE (2005)
Yi-Shing Chang, Sreejit Chakravarty, Hiep Hoang, Nick Thorpe, Khen Wee
Transition Tests for High Performance Microprocessors. VTS (2005)
Manan Syal, Michael S. Hsiao, Suriyaprakash Natarajan, Sreejit Chakravarty
Untestable Multi-Cycle Path Delay Faults in Industrial Designs. Asian Test Symposium (2005)
Manan Syal, Michael S. Hsiao, Sreejit Chakravarty
Identifying Untestable Transition Faults in Latch Based Designs with Multiple Clocks. ITC (2004)
Sreejit Chakravarty, Eric W. Savage, Eric N. Tran
Defect Coverage Analysis of Partitioned Testing. ITC (2004)
Sujit T. Zachariah, Sreejit Chakravarty
Extraction of two-node bridges from large industrial circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (3) (2004)
Manan Syal, Michael S. Hsiao, Kiran B. Doreswamy, Sreejit Chakravarty
Efficient Implication - Based Untestable Bridge Fault Identifier. VTS (2003)
Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
Efficient Transition Fault ATPG Algorithms Based on Stuck-At Test Vectors. J. Electron. Test. 19 (4) (2003)
Sujit T. Zachariah, Sreejit Chakravarty
Algorithm to extract two-node bridges. IEEE Trans. Very Large Scale Integr. Syst. 11 (4) (2003)
Sreejit Chakravarty, Kambiz Komeyli, Eric W. Savage, Michael J. Carruthers, Bret T. Stastny, Sujit T. Zachariah
Layout Analysis to Extract Open Nets Caused by Systematic Failure Mechanisms. VTS (2002)
Sreejit Chakravarty, Ankur Jain, Nandakumar Radhakrishnan, Eric W. Savage, Sujit T. Zachariah
Experimental Evaluation of Scan Tests for Bridges. ITC (2002)
Sreejit Chakravarty, Ankur Jain
Fault Models for Speed Failures Caused by Bridges and Opens. VTS (2002)
Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
Novel ATPG algorithms for transition faults. ETW (2002)
Sreejit Chakravarty
Supplemental Test Methods (Tutorial Abstract). ISQED (2002)
Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
Techniques to Reduce Data Volume and Application Time for Transition Test. ITC (2002)
Kamran Zarrineh, Shambhu J. Upadhyaya, Sreejit Chakravarty
Automatic generation and compaction of March tests for memory arrays. IEEE Trans. Very Large Scale Integr. Syst. 9 (6) (2001)
Ismed Hartanto, Srikanth Venkataraman, W. Kent Fuchs, Elizabeth M. Rudnick, Janak H. Patel, Sreejit Chakravarty
Diagnostic simulation of stuck-at faults in sequential circuits using compact lists. ACM Trans. Design Autom. Electr. Syst. 6 (4) (2001)
Sujit T. Zachariah, Sreejit Chakravarty
A Novel Algorithm for Multi-Node Bridge Analysis of Large VLSI Circuits. VLSI Design (2001)
Sujit T. Zachariah, Sreejit Chakravarty, Carl D. Roth
A novel algorithm to extract two-node bridges. DAC (2000)
Sujit T. Zachariah, Sreejit Chakravarty
A scalable and efficient methodology to extract two node bridges from large industrial circuits. ITC (2000)
Sreejit Chakravarty, Sujit T. Zachariah
tests forleakage faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (5) (2000)
Seonki Kim, Sreejit Chakravarty, Bapiraju Vinnakota
An analysis of the delay defect detection capability of the ECR test method. ITC (2000)
Sreenivas Mandava, Sreejit Chakravarty, Sandip Kundu
On Detecting Bridges Causing Timing Failures. ICCD (1999)
Sujit T. Zachariah, Sreejit Chakravarty
A Comparative Study of Pseudo Stuck-At and Leakage Fault Model. VLSI Design (1999)
Sreejit Chakravarty, Vinodh Gopal
Techniques to Encode and Compress Fault Dictionaries. VTS (1999)
Kamran Zarrineh, Shambhu J. Upadhyaya, Sreejit Chakravarty
A new framework for generating optimal March tests for memory arrays. ITC (1998)
Yiming Gong, Sreejit Chakravarty
Locating bridging faults using dynamically computed stuck-at fault dictionaries. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17 (9) (1998)
Vinay Dabholkar, Sreejit Chakravarty
Computing Stress Tests for Gate Oxide Shorts. VLSI Design (1998)
Vinay Dabholkar, Sreejit Chakravarty, Irith Pomeranz, Sudhakar M. Reddy
Techniques for minimizing power dissipation in scan and combinational circuits during test application. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17 (12) (1998)
Paul J. Thadikaran, Sreejit Chakravarty, Janak H. Patel
test sets. ACM Trans. Design Autom. Electr. Syst. 2 (3) (1997)
Sreejit Chakravarty
On the capability of delay tests to detect bridges and opens. Asian Test Symposium (1997)
Yiming Gong, Sreejit Chakravarty
diagnostic test set. VTS (1997)
Vinay Dabholkar, Sreejit Chakravarty
Computing stress tests for interconnect defects. Asian Test Symposium (1997)
Paul J. Thadikaran, Sreejit Chakravarty
Fast Algorithms for Computer IDDQ Tests for Combination Circuits. VLSI Design (1996)
Sreejit Chakravarty, Yiming Gong, Srikanth Venkataraman
Diagnostic simulation of stuck-at faults in combinational circuits. J. Electron. Test. 8 (1) (1996)
Sreejit Chakravarty, Paul J. Thadikaran
Simulation and Generation of IDDQ Tests for Bridging Faults in Combinational Circuits. IEEE Trans. Computers 45 (10) (1996)
Sreejit Chakravarty, Paul J. Thadikaran
measurement points to detect bridging faults. J. Electron. Test. 8 (3) (1996)
Sreejit Chakravarty
A sampling technique for diagnostic fault simulation. VTS (1996)
Sreejit Chakravarty
A Study of Theoretical Issues in the Synthesis of Delay Fault Testability Circuits. IEEE Trans. Computers 45 (8) (1996)
Srikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs, Elizabeth M. Rudnick, Sreejit Chakravarty, Janak H. Patel
Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists. DAC (1995)
Sreejit Chakravarty, Yiming Gong
Voting model based diagnosis of bridging faults in combinational circuits. VLSI Design (1995)
Sreejit Chakravarty, Ramalingam Sridhar, Shambhu J. Upadhyaya, Yervant Zorian, Gil Philips, Bozena Kaminska, Bernard Courtois
Conference Reports. IEEE Des. Test Comput. 12 (4) (1995)
Paul J. Thadikaran, Sreejit Chakravarty, Janak H. Patel
Tests for Bridging Faults in Sequential Circuits. FTCS (1995)

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Publication Activity (10 Years)

Top Topics

Top Venues

Sreejit Chakravarty