Po-Yao Chuang

Publication Activity (10 Years)

Years Active: 2016-2024
Publications (10 Years): 12

Top Topics

Test Generation

Pattern Generation

Object Classification

Top Venues

Publications

Erik Jan Marinissen, Adrian Evans, Po-Yao Chuang, Martin Keim, Anshuman Chandra
New Standard-under-Development for Chiplet Interconnect Test and Repair: IEEE Std P3405. ETS (2024)
Tsung-Hsuan Wang, Po-Yao Chuang, Francesco Lorenzelli, Erik Jan Marinissen
Test and Repair Improvements for UCIe. ETS (2024)
Erik Jan Marinissen, Vineet Pancholi, Po-Yao Chuang, Martin Keim
IEEE Std P3405: New Standard-under-Development for Chiplet Interconnect Test and Repair. VTS (2024)
Po-Yao Chuang, Francesco Lorenzelli, Sreejit Chakravarty, Cheng-Wen Wu, Georges G. E. Gielen, Erik Jan Marinissen
Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects in Chiplet-Based Multi-Die Packages. VTS (2023)
Po-Yao Chuang, Francesco Lorenzelli, Sreejit Chakravarty, Slimane Boutobza, Cheng-Wen Wu, Georges G. E. Gielen, Erik Jan Marinissen
Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages. 3DIC (2023)
Po-Yao Chuang, Francesco Lorenzelli, Erik Jan Marinissen
Generating Test Patterns for Chiplet Interconnects: Achieving Optimal Effectiveness and Efficiency. ITC-Asia (2023)
Hong-Hao Wang, Po-Yao Chuang, Cheng-Wen Wu
A Thermal Quorum Sensing Scheme for Enhancement of Integrated-Circuit Reliability and Lifetime. VLSI-DAT (2022)
Po-Yao Chuang, Pai-Yu Tan, Cheng-Wen Wu, Juin-Ming Lu
A 90nm 103.14 TOPS/W Binary-Weight Spiking Neural Network CMOS ASIC for Real-Time Object Classification. DAC (2020)
Pai-Yu Tan, Po-Yao Chuang, Yen-Ting Lin, Cheng-Wen Wu, Juin-Ming Lu
A Power-Efficient Binary-Weight Spiking Neural Network Architecture for Real-Time Object Classification. CoRR (2020)
Po-Yao Chuang, Cheng-Wen Wu, Harry H. Chen
Covering hard-to-detect defects by thermal quorum sensing. ETS (2018)
Po-Yao Chuang, Cheng-Wen Wu, Harry H. Chen
Cell-aware test generation time reduction by using switch-level ATPG. ITC-Asia (2017)
Harry H. Chen, Simon Y.-H. Chen, Po-Yao Chuang, Cheng-Wen Wu
Efficient Cell-Aware Fault Modeling by Switch-Level Test Generation. ATS (2016)