Harry H. Chen

Publication Activity (10 Years)

Years Active: 1984-2024
Publications (10 Years): 17

Top Topics

Structural Patterns

Lifting Wavelet

Signature Recognition

Top Venues

Publications

Chien-Yu Lu, Bo-Jr Huang, Min-Chieh Chen, Ollie Tsai, Alfred Tsai, Eric Jia-Wei Fang, Yuju Cho, Harry H. Chen, Ping Kao, Ericbill Wang, Hugh Mair, Shih-Arn Hwang
14.4 A Fully Digital Current Sensor Offering Per-Core Runtime Power for System Budgeting in a 4nm-Plus Octa-Core CPU. ISSCC (2024)
Bo-Jr Huang, Alfred Tsai, Lear Hsieh, Kathleen Chang, C.-J. Tsai, Jia-Ming Chen, Eric Jia-Wei Fang, Sung S.-Y. Hsueh, Jack Ciao, Barry Chen, Chuck Chang, Ping Kao, Ericbill Wang, Harry H. Chen, Hugh Mair, Shih-Arn Hwang
A 5G Mobile Gaming-Centric SoC with High-Performance Thermal Management in 4nm FinFET. ISSCC (2023)
Chun Chen, Jeng-Yu Liao, James Chien-Mo Li, Harry H. Chen, Eric Jia-Wei Fang
Vmin Prediction Using Nondestructive Stress Test. VTS (2023)
Chun-Yeh Wang, Chien-Hsing Liang, Jing-Jia Liou, Harry H. Chen
Signal Reduction of Signature Blocks for Transient Fault Debugging. ATS (2023)
Zih-Ming Huang, Dun-An Yang, Jing-Jia Liou, Harry H. Chen
FPGA-Based Emulation for Accelerating Transient Fault Reduction Analysis. ATS (2022)
Dun-An Yang, Jing-Jia Liou, Harry H. Chen
Transient Fault Pruning for Effective Candidate Reduction in Functional Debugging. ITC (2022)
Dun-An Yang, Yu-Teng Chang, Ting-Shuo Hsu, Jing-Jia Liou, Harry H. Chen
ACE-Pro: Reduction of Functional Errors with ACE Propagation Graph. ITC (2021)
Dun-An Yang, Jing-Jia Liou, Harry H. Chen
Analyzing Transient Faults and Functional Error Rates of a RISC-V Core: A Case Study. ATS (2021)
Bo-Jr Huang, Eric Jia-Wei Fang, Sung S.-Y. Hsueh, Rory Huang, Angus Lin, Chi-Hsun Chiang, Yi-Hsuan Lin, Wen-Wen Hsieh, Barry Chen, Yi-Chang Zhuang, Cheng-Yuh Wu, Jia-Ming Chen, Y. S. Chen, Cheng-Tien Wan, Ericbill Wang, Alex Chiou, Ping Kao, Yuwen Tsai, Harry H. Chen, Shih-Arn Hwang
35.1 An Octa-Core 2.8/2GHz Dual-Gear Sensor-Assisted High-Speed and Power-Efficient CPU in 7nm FinFET 5G Smartphone SoC. ISSCC (2021)
Takeshi Iwasaki, Masao Aso, Haruji Futami, Satoshi Matsunaga, Yousuke Miyake, Takaaki Kato, Seiji Kajihara, Yukiya Miura, Smith Lai, Gavin Hung, Harry H. Chen, Haruo Kobayashi, Kazumi Hatayama
Innovative Test Practices in Asia. VTS (2020)
Jiang-Tang Xiao, Ting-Shuo Hsu, Christian M. Fuchs, Yu-Teng Chang, Jing-Jia Liou, Harry H. Chen
An ISA-level Accurate Fault Simulator for System-level Fault Analysis. ATS (2020)
Henry Cox, Harry H. Chen
Hardware and firmware verification and validation: an algorithm-to-firmware development methodology. DATE (2019)
Po-Yao Chuang, Cheng-Wen Wu, Harry H. Chen
Covering hard-to-detect defects by thermal quorum sensing. ETS (2018)
Harry H. Chen
Beyond structural test, the rising need for system-level test. VLSI-DAT (2018)
Harry H. Chen
Enhancing the efficiency and accuracy of cell-aware testing to reach zero defects. VLSI-DAT (2017)
Po-Yao Chuang, Cheng-Wen Wu, Harry H. Chen
Cell-aware test generation time reduction by using switch-level ATPG. ITC-Asia (2017)
Harry H. Chen, Simon Y.-H. Chen, Po-Yao Chuang, Cheng-Wen Wu
Efficient Cell-Aware Fault Modeling by Switch-Level Test Generation. ATS (2016)
Jing-Jia Liou, Meng-Ta Hsieh, Jun-Fei Cherng, Harry H. Chen
Cost reduction of system-level tests with stressed structural tests and SVM. VLSI-SoC (2015)
Bing-Yang Lin, Cheng-Wen Wu, Harry H. Chen
System-level test coverage prediction by structural stress test data mining. VLSI-DAT (2015)
Harry H. Chen, Shih-Hua Kuo, Jonathan Tung, Mango Chia-Tso Chao
Statistical techniques for predicting system-level failure using stress-test data. VTS (2015)
Harry H. Chen
The case for analyzing system level failures using structural patterns. ITC (2014)
Harry H. Chen
Perspectives on Test Data Mining from Industrial Experience. ATS (2014)
Harry H. Chen, Roger Hsu, PaulYoung Yang, J. J. Shyr
Predicting system-level test and in-field customer failures using data mining. ITC (2013)
Harry H. Chen, Robert G. Mathews, John A. Newkirk
An Algorithm to Generate Tests for MOS Circuits at the Switch Level. ITC (1985)
Harry H. Chen, Robert G. Mathews, John A. Newkirk
Test Generation for MOS Circuits. ITC (1984)