Anshuman Chandra

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 2

Top Topics

Image Compression

Discrete Fourier Transform

Designing Effective

Document Understanding

Top Venues

Publications

Erik Jan Marinissen, Adrian Evans, Po-Yao Chuang, Martin Keim, Anshuman Chandra
New Standard-under-Development for Chiplet Interconnect Test and Repair: IEEE Std P3405. ETS (2024)
Anshuman Chandra, Moiz Khan, Ankita Patidar, Fumiaki Takashima, Sandeep Kumar Goel, Bharath Shankaranarayanan, Vuong Nguyen, Vistrita Tyagi, Manish Arora
A Case Study on IEEE 1838 Compliant Multi-Die 3DIC DFT Implementation. ITC (2023)
Anshuman Chandra, Santosh Kulkarni, Subramanian Chebiyam, Rohit Kapur
Designing efficient combinational compression architecture for testing industrial circuits. VDAT (2015)
Subramanian Chebiyam, Anshuman Chandra, Rohit Kapur
Designing effective scan compression solutions for industrial circuits. ISQED (2015)
Swapnil Bahl, Shreyans Rungta, Shray Khullar, Rohit Kapur, Anshuman Chandra, Salvatore Talluto, Pramod Notiyath, Ajay Rajagopalan
Unifying scan compression. DFT (2014)
Anshuman Chandra, Subramanian Chebiyam, Rohit Kapur
A Case Study on Implementing Compressed DFT Architecture. ATS (2014)
Anshuman Chandra
Special session 11B: Hot topic on-chip clocking - Industrial trends. VTS (2013)
Uzair Shah Syed, Krishnendu Chakrabarty, Anshuman Chandra, Rohit Kapur
3D-Scalable Adaptive Scan (3D-SAS). 3DIC (2011)
Anshuman Chandra, Jyotirmoy Saikia, Rohit Kapur
Breaking the Test Application Time Barriers in Compression: Adaptive Scan-Cyclical (AS-C). Asian Test Symposium (2011)
Anshuman Chandra, Yasunari Kanzawa, Rohit Kapur
Proactive management of X's in scan chains for compression. ISQED (2009)
Anshuman Chandra, Rohit Kapur, Yasunari Kanzawa
Scalable Adaptive Scan (SAS). DATE (2009)
Anshuman Chandra, Felix Ng, Rohit Kapur
Low Power Illinois Scan Architecture for Simultaneous Power and Test Data Volume Reduction. DATE (2008)
Anshuman Chandra, Rohit Kapur
Interval Based X-Masking for Scan Compression Architectures. ISQED (2008)
Anshuman Chandra, Rohit Kapur
Not All Xs are Bad for Scan Compression. ATS (2008)
Anshuman Chandra, Rohit Kapur
Bounded Adjacent Fill for Low Capture Power Scan Testing. VTS (2008)
Yinhe Han, Yu Hu, Xiaowei Li, Huawei Li, Anshuman Chandra
Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit. IEEE Trans. Very Large Scale Integr. Syst. 15 (5) (2007)
Anshuman Chandra, Haihua Yan, Rohit Kapur
Multimode Illinois Scan Architecture for Test Application Time and Test Data Volume Reduction. VTS (2007)
Rohit Kapur, T. Finklea, Felix Ng, Anshuman Chandra, Sanjay Ramnath, Peter Wohl, Thomas W. Williams, Ashok Anbalan, Sandeep S. Kulkarni, Tammy Fernandes, Pramod Notiyath, Rajesh Uppuluri
DFT MAX and Power. J. Low Power Electron. 3 (2) (2007)
Yinhe Han, Huawei Li, Xiaowei Li, Anshuman Chandra
Response compaction for system-on-a-chip based on advanced convolutional codes. Sci. China Ser. F Inf. Sci. 49 (2) (2006)
Yinhe Han, Xiaowei Li, Huawei Li, Anshuman Chandra
Embedded test resource for SoC to reduce required tester channels based on advanced convolutional codes. IEEE Trans. Instrum. Meas. 55 (2) (2006)
Yinhe Han, Yu Hu, Xiaowei Li, Huawei Li, Anshuman Chandra, Xiaoqing Wen
Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores. IEICE Trans. Inf. Syst. (9) (2005)
Yinhe Han, Xiaowei Li, Shivakumar Swaminathan, Yu Hu, Anshuman Chandra
Scan Data Volume Reduction Using Periodically Alterable MUXs Decompressor. Asian Test Symposium (2005)
Yinhe Han, Xiaowei Li, Huawei Li, Anshuman Chandra
Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Tester Channels Reduction. J. Comput. Sci. Technol. 20 (2) (2005)
Anshuman Chandra, Krishnendu Chakrabarty
Analysis of Test Application Time for Test Data Compression Methods Based on Compression Codes. J. Electron. Test. 20 (2) (2004)
Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman Chandra
Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes. DFT (2004)
Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman Chandra
Rapid and Energy-Efficient Testing for Embedded Cores. Asian Test Symposium (2004)
Vikram Iyengar, Anshuman Chandra
A Uni.ed SOC Test Approach Based on Test Data Compression and TAM Design. DFT (2003)
Anshuman Chandra, Krishnendu Chakrabarty
Test Data Compression and Test Resource Partitioning for System-on-a-Chip Using Frequency-Directed Run-Length (FDR) Codes. IEEE Trans. Computers 52 (8) (2003)
Vikram Iyengar, Anshuman Chandra, Sharon Schweizer, Krishnendu Chakrabarty
A Unified Approach for SOC Testing Using Test Data Compression and TAM Optimization. DATE (2003)
Yinhe Han, Yongjun Xu, Huawei Li, Xiaowei Li, Anshuman Chandra
Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Teste. Asian Test Symposium (2003)
Anshuman Chandra, Krishnendu Chakrabarty
A unified approach to reduce SOC test data volume, scan power and testing time. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (3) (2003)
Anshuman Chandra, Krishnendu Chakrabarty
Reduction of SOC test data volume, scan power and testing time using alternating run-length codes. DAC (2002)
Anshuman Chandra, Krishnendu Chakrabarty, Rafael A. Medina
How Effective are Compression Codes for Reducing Test Data Volume? VTS (2002)
Anshuman Chandra, Krishnendu Chakrabarty
Test data compression and decompression based on internal scanchains and Golomb coding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (6) (2002)
Anshuman Chandra, Krishnendu Chakrabarty
Low-power scan testing and test data compression forsystem-on-a-chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (5) (2002)
Anshuman Chandra, Krishnendu Chakrabarty
Test Resource Partitioning and Reduced Pin-Count Testing Based on Test Data Compression. DATE (2002)
Anshuman Chandra, Krishnendu Chakrabarty, Mark C. Hansen
Efficient Test Application for Core-Based Systems Using Twisted-Ring Counters. VLSI Design 2001 (4) (2001)
Anshuman Chandra, Krishnendu Chakrabarty
Test Resource Partitioning for SOCs. IEEE Des. Test Comput. 18 (5) (2001)
Anshuman Chandra, Krishnendu Chakrabarty
Efficient test data compression and decompression for system-on-a-chip using internal scan chains and Golomb coding. DATE (2001)
Anshuman Chandra, Krishnendu Chakrabarty
Combining Low-Power Scan Testing and Test Data Compression for System-on-a-Chip. DAC (2001)
Anshuman Chandra, Krishnendu Chakrabarty
Frequency-Directed Run-Length (FDR) Codes with Application to System-on-a-Chip Test Data Compression. VTS (2001)
Anshuman Chandra, Krishnendu Chakrabarty
System-on-a-chip test-data compression and decompressionarchitectures based on Golomb codes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (3) (2001)
Anshuman Chandra, Krishnendu Chakrabarty
Test Data Compression for System-on-a-Chip Using Golomb Codes. VTS (2000)