Low Power Illinois Scan Architecture for Simultaneous Power and Test Data Volume Reduction.
Anshuman ChandraFelix NgRohit KapurPublished in: DATE (2008)
Keyphrases
- test data
- low power
- power consumption
- vlsi architecture
- high power
- power reduction
- power management
- high speed
- cmos technology
- low cost
- test cases
- training data
- nm technology
- power dissipation
- test set
- single chip
- power saving
- training set
- mixed signal
- digital signal processing
- low power consumption
- data sets
- signal processor
- logic circuits
- real time
- ultra low power
- energy dissipation
- training and test data
- multithreading
- image sensor
- design methodology
- hardware implementation
- data center
- training samples
- computer vision