Vijay Gangaram

Publication Activity (10 Years)

Years Active: 1995-2018
Publications (10 Years): 1

Top Topics

Modulo Theories

Diagnostic Reasoning

Attention Deficit Hyperactivity Disorder

Top Venues

Publications

I-De Huang, Pallav Gupta, Loganathan Lingappan, Vijay Gangaram
Online Scan Diagnosis : A Novel Approach to Volume Diagnosis. ITC (2018)
Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram
Test generation for circuits with embedded memories using SMT. ETS (2013)
Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram
A Novel SMT-Based Technique for LFSR Reseeding. VLSI Design (2012)
Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram
A SMT-based diagnostic test generation method for combinational circuits. VTS (2012)
Sarvesh Prabhu, Michael S. Hsiao, Saparya Krishnamoorthy, Loganathan Lingappan, Vijay Gangaram, Jim Grundy
An Efficient 2-Phase Strategy to Achieve High Branch Coverage. Asian Test Symposium (2011)
Loganathan Lingappan, Vijay Gangaram, Niraj K. Jha, Sreejit Chakravarty
Fast Enhancement of Validation Test Sets for Improving the Stuck-at Fault Coverage of RTL Circuits. IEEE Trans. Very Large Scale Integr. Syst. 17 (5) (2009)
Jian Kang, Sharad C. Seth, Yi-Shing Chang, Vijay Gangaram
Efficient Selection of Observation Points for Functional Tests. ISQED (2008)
Jian Kang, Sharad C. Seth, Vijay Gangaram
Efficient RTL Coverage Metric for Functional Test Selection. VTS (2007)
Loganathan Lingappan, Vijay Gangaram, Niraj K. Jha
Fast Enhancement of Validation Test Sets to Improve Stuck-at Fault Coverage for RTL circuits. VLSI Design (2007)
Vishwani D. Agrawal, Soumitra Bose, Vijay Gangaram
Upper Bounding Fault Coverage by Structural Analysis and Signal Monitoring. VTS (2006)
Vijay Gangaram, Deepa Bhan, James K. Caldwell
Functional Test Selection for High Volume Manufacturing. MTV (2006)
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak
A controller redesign technique to enhance testability of controller-data path circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17 (2) (1998)
Srimat T. Chakradhar, Vijay Gangaram, Steven G. Rothweiler
Deriving Signal Constraints to Accelerate Sequential Test Generation. VLSI Design (1997)
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak
A controller-based design-for-testability technique for controller-data path circuits. ICCAD (1995)