André Ivanov

ORCID

Publication Activity (10 Years)

Years Active: 1986-2024
Publications (10 Years): 20

Top Venues

Publications

Yuxuan Pan, Zhonghua Zhou, S. Arash Sheikholeslam, André Ivanov
VioNet: A Hierarchical Detailed Routing Wire-Short Violation Predictor Based on a Convolutional Neural Network. IEEE Des. Test 41 (2) (2024)
Zhonghua Zhou, Yuxuan Pan, Guy G. F. Lemieux, André Ivanov
MEDUSA: A Multi-Resolution Machine Learning Congestion Estimation Method for 2D and 3D Global Routing. ACM Trans. Design Autom. Electr. Syst. 28 (5) (2023)
Ian Hill, André Ivanov
Gerabaldi: A Temporal Simulator for Probabilistic IC Degradation and Failure Processes. VTS (2023)
Parvez Anwar Chanawala, Ian Hill, S. Arash Sheikholeslam, André Ivanov
Prediction of Thermally Accelerated Aging Process at 28nm. ETS (2022)
Yuxuan Pan, Zhonghua Zhou, André Ivanov
Routability-driven Global Routing with 3D Congestion Estimation Using a Customized Neural Network. ISQED (2022)
Mehdi Karimibiuki, Karthik Pattabiraman, André Ivanov
Are you for Real? Authentication in Dynamic IoT Systems. PRDC (2021)
Zhonghua Zhou, Sunmeet Chahal, Tsung-Yi Ho, André Ivanov
Supervised-Learning Congestion Predictor For Routability-Driven Global Routing. VLSI-DAT (2019)
Mehdi Karimibiuki, Ekta Aggarwal, Karthik Pattabiraman, André Ivanov
DynPolAC: Dynamic Policy-Based Access Control for IoT Systems. PRDC (2018)
Ekta Aggarwal, Mehdi Karimibiuki, Karthik Pattabiraman, André Ivanov
CORGIDS: A Correlation-based Generic Intrusion Detection System. CPS-SPC@CCS (2018)
Mehdi Karimibiuki, André Ivanov
MiniCloud: a mini storage and query service for local heterogeneous IoT devices. IOT (2018)
Lucheng He, Aijiao Cui, Mengyang Li, André Ivanov
An improved test power optimization method by insertion of linear functions. ISCAS (2016)
André Ivanov, Peter Hallschmid, Zhonghua Zhou
Local congestion and blockage aware routability analysis using adaptive flexible modeling. ICECS (2016)
André Ivanov
Speeding Up Analog Integration and Test for Mixed-Signal SoCs. IEEE Des. Test 32 (1) (2015)
André Ivanov
Microfluidics: Design and Test Solutions for Enabling Biochemistry on a Chip. IEEE Des. Test 32 (6) (2015)
André Ivanov
A Look at Trojan Attack, Pruning, and Dependability. IEEE Des. Test 32 (2) (2015)
Tingting Yu, Aijiao Cui, Mengyang Li, André Ivanov
A new decompressor with ordered parallel scan design for reduction of test data and test time. ISCAS (2015)
André Ivanov
Advances in 3-D Integrated Circuits, Systems, and CAD Tools. IEEE Des. Test 32 (4) (2015)
André Ivanov
A Look at Asynchronous Design and Photonic Network-on-a-Chip (PNoC). IEEE Des. Test 32 (3) (2015)
Ricardo Ochoa Gallardo, Alan J. Hu, André Ivanov, Maryam S. Mirian
Reducing Post-Silicon Coverage Monitoring Overhead with Emulation and Bayesian Feature Selection. ICCAD (2015)
André Ivanov
Cyber-Physplical Systems for Medical Apications. IEEE Des. Test 32 (5) (2015)
S. Arash Sheikholeslam, Cristian Grecu, André Ivanov
A novel tri-state device implemented with a metal gated QCA. LASCAS (2014)
Partha Pratim Pande, Alireza Nojeh, André Ivanov
T1B: Wireless NoC as interconnection backbone for multicore chips: Promises and challenges. SoCC (2014)
Alireza Nojeh, Partha Pratim Pande, André Ivanov
T2B: Carbon nanotubes and opportunities for wireless on-chip interconnect. SoCC (2014)
André Ivanov
Design and Testing of Millimeter-Wave/Subterahertz Circuits and Systems. IEEE Des. Test 31 (6) (2014)
Ge Yu, Shahriar Mirabbasi, André Ivanov
Performance comparison of two wide-tuning-range 13-GHz CMOS LC-VCOs. ICECS (2014)
Amir Hossein Masnadi Shirazi, Reza Molavi, Peter Sangpil Woo, Ge Yu, Shahriar Mirabbasi, Sudip Shekhar, André Ivanov
A low-power DC-to-27-GHz transimpedance amplifier in 0.13-µm CMOS using inductive-peaking and current-reuse techniques. MWSCAS (2014)
André Ivanov
Revisiting DAC's 50th Anniversary. IEEE Des. Test 31 (2) (2014)
André Ivanov
The Internet of Things. IEEE Des. Test 31 (3) (2014)
Kyle Balston, Mehdi Karimibiuki, Alan J. Hu, André Ivanov, Steven J. E. Wilton
Post-Silicon Code Coverage for Multiprocessor System-on-Chip Designs. IEEE Trans. Computers 62 (2) (2013)
Dipanjan Sengupta, Flavio M. de Paula, Alan J. Hu, Andreas G. Veneris, André Ivanov
Lazy suspect-set computation: fault diagnosis for deep electrical bugs. ACM Great Lakes Symposium on VLSI (2012)
Dipanjan Sengupta, Andreas G. Veneris, Steven J. E. Wilton, André Ivanov
Multi-objective voltage island floorplanning using sequence pair representation. Sustain. Comput. Informatics Syst. 2 (2) (2012)
Renato P. Ribas, Yuyang Sun, André Inácio Reis, André Ivanov
Self-checking test circuits for latches and flip-flops. IOLTS (2011)
Dipanjan Sengupta, Andreas G. Veneris, Steven J. E. Wilton, André Ivanov, Res Saleh
Sequence pair based voltage island floorplanning. IGCC (2011)
Mehdi Karimibiuki, Kyle Balston, Alan J. Hu, André Ivanov
Post-silicon code coverage evaluation with reduced area overhead for functional verification of SoC. HLDVT (2011)
Renato P. Ribas, Yuyang Sun, André Inácio Reis, André Ivanov
Ring oscillators for functional and delay test of latches and flip-flops. SBCCI (2011)
Renato P. Ribas, André Inácio Reis, André Ivanov
Performance and functional test of flip-flops using ring oscillator structure. IDT (2011)
Erno Salminen, Cristian Grecu, Timo D. Hämäläinen, André Ivanov
Application modelling and hardware description for network-on-chip benchmarking. IET Comput. Digit. Tech. 3 (5) (2009)
Faizal Karim, Marco Ottavi, Hamidreza Hashempour, Vamsi Vankamamidi, Konrad Walus, André Ivanov, Fabrizio Lombardi
Modeling and Evaluating Errors Due to Random Clock Shifts in Quantum-Dot Cellular Automata Circuits. J. Electron. Test. 25 (1) (2009)
Rod Blaine Foist, Cristian Grecu, André Ivanov, Robin Turner
An FPGA Design Project: Creating a PowerPC Subsystem Plus User Logic. IEEE Trans. Educ. 51 (3) (2008)
Partha Pratim Pande, Amlan Ganguly, Benjamin Belzer, Alireza Nojeh, André Ivanov
Novel interconnect infrastructures for massive multicore chips - an overview. ISCAS (2008)
Cristian Grecu, André Ivanov, Resve A. Saleh, Partha Pratim Pande
Testing Network-on-Chip Communication Fabrics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (12) (2007)
Baosheng Wang, Yuejian Wu, André Ivanov
A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs CoRR (2007)
Marco Ottavi, Hamidreza Hashempour, Vamsi Vankamamidi, Faizal Karim, Konrad Walus, André Ivanov
On the Error Effects of Random Clock Shifts in Quantum-Dot Cellular Automata Circuits. DFT (2007)
Qiang Xu, Baosheng Wang, André Ivanov, Fung Yu Young
Test scheduling for built-in self-tested embedded SRAMs with data retention faults. IET Comput. Digit. Tech. 1 (3) (2007)
Zahra Sadat Ebadi, Alireza Nasiri Avanaki, Resve A. Saleh, André Ivanov
Design and implementation of reconfigurable and flexible test access mechanism for system-on-chip. Integr. 40 (2) (2007)
Samad Sheikhaei, Shahriar Mirabbasi, André Ivanov
A 43 mW single-channel 4GS/s 4-bit flash ADC in 0.18 μm CMOS. CICC (2007)
Cristian Grecu, André Ivanov, Partha Pratim Pande, Axel Jantsch, Erno Salminen, Ümit Y. Ogras, Radu Marculescu
Towards Open Network-on-Chip Benchmarks. NOCS (2007)
Rod Blaine Foist, André Ivanov, Robin Turner
An FPGA Design Project: Creating a PowerPC Subsystem Plus User Logic. MSE (2007)
A. K. M. K. Mollah, Roberto Rosales, Sassan Tabatabaei, James Cicalo, André Ivanov
Design of a Tunable Differential Ring Oscillator With Short Start-Up and Switching Transients. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2007)
Cristian Grecu, Lorena Anghel, Partha Pratim Pande, André Ivanov, Resve A. Saleh
Essential Fault-Tolerance Metrics for NoC Infrastructures. IOLTS (2007)
Cristian Grecu, André Ivanov, Res Saleh, Egor S. Sogomonyan, Partha Pratim Pande
On-line Fault Detection and Location for NoC Interconnects. IOLTS (2006)
Josh Yang, Baosheng Wang, Yuejian Wu, André Ivanov
Fast detection of data retention faults and other SRAM cell open defects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (1) (2006)
André Ivanov
Session Abstract. VTS (2006)
Yuejian Wu, André Ivanov
Low Power SoC Memory BIST. DFT (2006)
Resve A. Saleh, Steven J. E. Wilton, Shahriar Mirabbasi, Alan J. Hu, Mark R. Greenstreet, Guy Lemieux, Partha Pratim Pande, Cristian Grecu, André Ivanov
System-on-Chip: Reuse and Integration. Proc. IEEE 94 (6) (2006)
Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh
BIST for Network-on-Chip Interconnect Infrastructures. VTS (2006)
Cristian Grecu, André Ivanov, Res Saleh, Partha Pratim Pande
NoC Interconnect Yield Improvement Using Crosspoint Redundancy. DFT (2006)
Baosheng Wang, Yuejian Wu, Josh Yang, André Ivanov, Yervant Zorian
SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms. VTS (2005)
Baosheng Wang, Yuejian Wu, André Ivanov
A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs. DATE (2005)
Baosheng Wang, Josh Yang, Yuejian Wu, André Ivanov
A retention-aware test power model for embedded SRAM. ASP-DAC (2005)
Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Res Saleh
Effect of traffic localization on energy dissipation in NoC-based interconnect. ISCAS (2) (2005)
Baosheng Wang, Andy Kuo, Touraj Farahmand, André Ivanov, Yong B. Cho, Sassan Tabatabaei
A Realistic Timing Test Model and Its Applications in High-Speed Interconnect Devices. J. Electron. Test. 21 (6) (2005)
Samad Sheikhaei, Shahriar Mirabbasi, André Ivanov
A 4-bit 5 GS/s flash A/D converter in 0.18µm CMOS. ISCAS (6) (2005)
Cristian Grecu, Partha Pratim Pande, Baosheng Wang, André Ivanov, Res Saleh
Methodologies and Algorithms for Testing Switch-Based NoC Interconnects. DFT (2005)
Samad Sheikhaei, Shahriar Mirabbasi, André Ivanov
A 0.35µm CMOS comparator circuit for high-speed ADC applications. ISCAS (6) (2005)
Yvan Maidon, Thomas Zimmer, André Ivanov
An Analog Circuit Fault Characterization Methodology. J. Electron. Test. 21 (2) (2005)
Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Resve A. Saleh
Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures. IEEE Trans. Computers 54 (8) (2005)
André Ivanov, Giovanni De Micheli
Guest Editors' Introduction: The Network-on-Chip Paradigm in Practice and Research. IEEE Des. Test Comput. 22 (5) (2005)
Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh
Timing analysis of network on chip architectures for MP-SoC platforms. Microelectron. J. 36 (9) (2005)
Partha Pratim Pande, Cristian Grecu, André Ivanov, Resve A. Saleh, Giovanni De Micheli
Design, Synthesis, and Test of Networks on Chips. IEEE Des. Test Comput. 22 (5) (2005)
Andy Kuo, Roberto Rosales, Touraj Farahmand, Sassan Tabatabaei, André Ivanov
Crosstalk bounded uncorrelated jitter (BUJ) for high-speed interconnects. IEEE Trans. Instrum. Meas. 54 (5) (2005)
Touraj Farahmand, Sassan Tabatabaei, Freddy Ben-Zeev, André Ivanov
A DDJ calibration methodology for high-speed test and measurement equipments. ITC (2005)
Baosheng Wang, Yuejian Wu, André Ivanov
Designs for Reducing Test Time of Distributed Small Embedded SRAMs. DFT (2004)
Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh
Structured interconnect architecture: a solution for the non-scalability of bus-based SoCs. ACM Great Lakes Symposium on VLSI (2004)
Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh
A Scalable Communication-Centric SoC Interconnect Architecture. ISQED (2004)
Josh Yang, Baosheng Wang, André Ivanov
Open Defects Detection within 6T SRAM Cells using a No Write Recovery Test Mode. VLSI Design (2004)
André Ivanov, Fabrizio Lombardi, Cecilia Metra
Guest Editors' Introduction: Advances in VLSI Testing at MultiGbps Rates. IEEE Des. Test Comput. 21 (4) (2004)
Josep Altet, Antonio Rubio, M. Amine Salhi, J. L. Gálvez, Stefan Dilhaire, Ashish Syal, André Ivanov
Sensing temperature in CMOS circuits for Thermal Testing. VTS (2004)
Baosheng Wang, Josh Yang, James Cicalo, André Ivanov, Yervant Zorian
Reducing Embedded SRAM Test Time under Redundancy Constraints. VTS (2004)
Andy Kuo, Touraj Farahmand, Nelson Ou, André Ivanov, Sassan Tabatabaei
Jitter Models and Measurement Methods for High-Speed Serial Interconnects. ITC (2004)
Mohsen Nahvi, André Ivanov
Indirect test architecture for SoC testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (7) (2004)
Nelson Ou, Touraj Farahmand, Andy Kuo, Sassan Tabatabaei, André Ivanov
Jitter Models for the Design and Test of Gbps-Speed Serial Interconnects. IEEE Des. Test Comput. 21 (4) (2004)
André Ivanov
Test Technology Technical Council Newsletter. J. Electron. Test. 19 (1) (2003)
Baosheng Wang, Yong B. Cho, Sassan Tabatabaei, André Ivanov
Yield, Overall Test Environment Timing Accuracy, and Defect Level Trade-Offs for High-Speed Interconnect Device Testing. Asian Test Symposium (2003)
André Ivanov
Test Technology Technical Council Newsletter. J. Electron. Test. 19 (4) (2003)
André Ivanov
Test Technology Technical Council Newsletter. J. Electron. Test. 19 (2) (2003)
Zahra Sadat Ebadi, André Ivanov
Time Domain Multiplexed TAM: Implementation and Comparison. DATE (2003)
André Ivanov
Test Technology Technical Council Newsletter. J. Electron. Test. 19 (5) (2003)
Partha Pratim Pande, Cristian Grecu, André Ivanov, Res Saleh
Design of a switch for network on chip applications. ISCAS (5) (2003)
André Ivanov
Guest Editorial. J. Electron. Test. 19 (2) (2003)
André Ivanov
Test Technology Technical Council Newsletter. J. Electron. Test. 19 (3) (2003)
Mohsen Nahvi, André Ivanov
An Embedded Autonomous Scan-Based Results Analyzer (EARA) for SoC Cores. VTS (2003)
Mama Hamour, Resve A. Saleh, Shahriar Mirabbasi, André Ivanov
Analog IP design flow for SoC applications. ISCAS (4) (2003)
Partha Pratim Pande, Cristian Grecu, André Ivanov
High-Throughput Switch-Based Interconnect for Future SoCs. IWSOC (2003)
Baosheng Wang, Josh Yang, André Ivanov
Reducing Test Time of Embedded SRAMs. MTDT (2003)
Josep Altet, André Ivanov, A. Wong
Thermal Testing of Analogue Integrated Circuits: A Case Study. J. Electron. Test. 19 (3) (2003)
Florence Azaïs, Yves Bertrand, Michel Renovell, André Ivanov, Sassan Tabatabaei
An All-Digital DFT Scheme for Testing Catastrophic Faults in PLLs. IEEE Des. Test Comput. 20 (1) (2003)
André Ivanov
Test Technology Technical Council Newsletter. J. Electron. Test. 18 (2) (2002)
Mohsen Nahvi, André Ivanov, Resve A. Saleh
Dedicated Autonomous Scan-Based Testing (DAST) for Embedded Cores. ITC (2002)
André Ivanov
Test Technology Technical Council Newsletter. J. Electron. Test. 18 (3) (2002)

André Ivanov.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

André Ivanov