Josh Yang

Publication Activity (10 Years)

Years Active: 2003-2017
Publications (10 Years): 1

Top Topics

Analog Circuits

Quantitative Analysis

Development Process

Top Venues

Publications

Long Zhao, Feng Zou, Josh Yang, Tianshen Tang, Yuhua Cheng
Analysis and characterization of process/layout impacts on the performance of high-speed analog circuits. ASICON (2017)
Josh Yang, Baosheng Wang, Yuejian Wu, André Ivanov
Fast detection of data retention faults and other SRAM cell open defects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (1) (2006)
Baosheng Wang, Yuejian Wu, Josh Yang, André Ivanov, Yervant Zorian
SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms. VTS (2005)
Baosheng Wang, Josh Yang, Yuejian Wu, André Ivanov
A retention-aware test power model for embedded SRAM. ASP-DAC (2005)
Josh Yang, Baosheng Wang, André Ivanov
Open Defects Detection within 6T SRAM Cells using a No Write Recovery Test Mode. VLSI Design (2004)
Baosheng Wang, Josh Yang, James Cicalo, André Ivanov, Yervant Zorian
Reducing Embedded SRAM Test Time under Redundancy Constraints. VTS (2004)
Baosheng Wang, Josh Yang, André Ivanov
Reducing Test Time of Embedded SRAMs. MTDT (2003)