Dipanjan Sengupta

Publication Activity (10 Years)

Years Active: 2005-2020
Publications (10 Years): 7

Top Venues

CoRR

ISC

ISLPED

Georgia Institute of Technology, Atlanta, GA, USA (PHD)

Education History

Georgia Institute of Technology, Atlanta, GA, USA

PHD

Publications

Mariano Tepper, Dipanjan Sengupta, Theodore L. Willke
Procrustean Orthogonal Sparse Hashing. CoRR (2020)
Guixiang Ma, Nesreen K. Ahmed, Theodore L. Willke, Dipanjan Sengupta, Michael W. Cole, Nicholas B. Turk-Browne, Philip S. Yu
Deep Graph Similarity Learning for Brain Data Analysis. CIKM (2019)
Probir Roy, Shuaiwen Leon Song, Sriram Krishnamoorthy, Abhinav Vishnu, Dipanjan Sengupta, Xu Liu
NUMA-Caffe: NUMA-Aware Deep Learning Neural Networks. ACM Trans. Archit. Code Optim. 15 (2) (2018)
Guixiang Ma, Nesreen K. Ahmed, Theodore L. Willke, Dipanjan Sengupta, Michael W. Cole, Nicholas B. Turk-Browne, Philip S. Yu
Similarity Learning with Higher-Order Proximity for Brain Network Analysis. CoRR (2018)
Dipanjan Sengupta, Yida Wang, Narayanan Sundaram, Theodore L. Willke
Xeon Phi™ Processors. ISC (2017)
Dipanjan Sengupta, Shuaiwen Leon Song
EvoGraph: On-the-Fly Efficient Mining of Evolving Graphs on GPU. ISC (2017)
Dipanjan Sengupta, Narayanan Sundaram, Xia Zhu, Theodore L. Willke, Jeffrey S. Young, Matthew Wolf, Karsten Schwan
GraphIn: An Online High Performance Incremental Graph Processing Framework. Euro-Par (2016)
Dipanjan Sengupta, Shuaiwen Leon Song, Kapil Agarwal, Karsten Schwan
GraphReduce: processing large-scale graphs on accelerator-based systems. SC (2015)
Dipanjan Sengupta, Qi Wang, Haris Volos, Ludmila Cherkasova, Jun Li, Guilherme Magalhaes, Karsten Schwan
A Framework for Emulating Non-Volatile Memory Systemswith Different Performance Characteristics. ICPE (2015)
Dipanjan Sengupta, Kapil Agarwal, Shuaiwen Leon Song, Karsten Schwan
GraphReduce: Large-Scale Graph Analytics on Accelerator-Based HPC Systems. IPDPS Workshops (2015)
Bao Le, Djordje Maksimovic, Dipanjan Sengupta, Erhan Ergin, Ryan Berryhill, Andreas G. Veneris
Constructing stability-based clock gating with hierarchical clustering. PATMOS (2015)
Dipanjan Sengupta, Anshuman Goswami, Karsten Schwan, Krishna Pallavi
Scheduling Multi-tenant Cloud Workloads on Accelerator-Based Systems. SC (2014)
Dipanjan Sengupta, Raghavendra Belapure, Karsten Schwan
Multi-tenancy on GPGPU-based servers. VTDC@HPDC (2013)
Bao Le, Dipanjan Sengupta, Andreas G. Veneris
Reviving erroneous stability-based clock-gating using partial Max-SAT. ASP-DAC (2013)
Dipanjan Sengupta, Erhan Ergin, Andreas G. Veneris
Early detection of current hot spots in power gated designs. ISLPED (2013)
Bao Le, Dipanjan Sengupta, Andreas G. Veneris, Zissis Poulos
Accelerating post silicon debug of deep electrical faults. IOLTS (2013)
Dipanjan Sengupta, Flavio M. de Paula, Alan J. Hu, Andreas G. Veneris, André Ivanov
Lazy suspect-set computation: fault diagnosis for deep electrical bugs. ACM Great Lakes Symposium on VLSI (2012)
Dipanjan Sengupta, Andreas G. Veneris, Steven J. E. Wilton, André Ivanov
Multi-objective voltage island floorplanning using sequence pair representation. Sustain. Comput. Informatics Syst. 2 (2) (2012)
Dipanjan Sengupta, Andreas G. Veneris, Steven J. E. Wilton, André Ivanov, Res Saleh
Sequence pair based voltage island floorplanning. IGCC (2011)
Dipanjan Sengupta, Resve A. Saleh
Application-Driven Voltage-Island Partitioning for Low-Power System-on-Chip Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (3) (2009)
Dipanjan Sengupta, Resve A. Saleh
Supply voltage selection in Voltage Island based SoC design. SoCC (2008)
Dipanjan Sengupta, Resve A. Saleh
Application-driven floorplan-aware voltage island design. DAC (2008)
Dipanjan Sengupta, Resve A. Saleh
Generalized Power-Delay Metrics in Deep Submicron CMOS Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (1) (2007)
Dipanjan Sengupta, Resve A. Saleh
Power-Delay Metrics Revisited for 90nm CMOS Technology. ISQED (2005)

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Publication Activity (10 Years)

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Dipanjan Sengupta