BIST for Network-on-Chip Interconnect Infrastructures.
Cristian GrecuPartha Pratim PandeAndré IvanovRes SalehPublished in: VTS (2006)
Keyphrases
- network on chip
- power dissipation
- interconnection networks
- power consumption
- low power
- routing algorithm
- packet switched
- fault tolerant
- network simulator
- digital signal processing
- high speed
- multistage
- parallel algorithm
- data management
- multi processor
- cmos technology
- image processing
- built in self test
- design methodology
- message passing
- data transfer
- ad hoc networks
- routing protocol
- wireless sensor networks