K. Sridharan

Publication Activity (10 Years)

Years Active: 1992-2024
Publications (10 Years): 16

Top Topics

Video Stabilization

Interval Analysis

Field Programmable Gate Array

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

IEEE Trans. Ind. Informatics

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Debasrita Kar, Boby George, K. Sridharan
Design and Implementation of a Magnetic Coupling Based Segmented Bend Angle Sensor for a Soft Robotic Gripper. IEEE Trans. Instrum. Meas. 73 (2024)
Debasrita Kar, Boby George, K. Sridharan
A Bending Angle Sensor Based on Magnetic Coupling Suitable for Soft Robotic Finger. SAS (2022)
Yashrajsinh Parmar, K. Sridharan
A High-Performance VLSI Architecture for a Self-Feedback Convolutional Neural Network. IEEE Trans. Circuits Syst. II Express Briefs 68 (1) (2021)
Pranjal Vyas, Leena Vachhani, K. Sridharan
Interval Analysis Technique for Versatile and Parallel Multi-Agent Collision Detection and Avoidance. J. Intell. Robotic Syst. 98 (3) (2020)
Yashrajsinh Parmar, K. Sridharan
A Resource-Efficient Multiplierless Systolic Array Architecture for Convolutions in Deep Networks. IEEE Trans. Circuits Syst. II Express Briefs (2) (2020)
Bhaskar Vundurthy, K. Sridharan
Protecting an Autonomous Delivery Agent Against a Vision-Guided Adversary: Algorithms and Experimental Results. IEEE Trans. Ind. Informatics 16 (9) (2020)
Bhaskar Vundurthy, K. Sridharan
Multiagent Gathering With Collision Avoidance and a Minimax Distance Criterion - Efficient Algorithms and Hardware Realization. IEEE Trans. Ind. Informatics 15 (2) (2019)
Sharad Kumar Singh, Puduru Viswanadha Reddy, K. Sridharan
Analysing interactions between a trio of differential drive robots via a differential game formulation. ACC (2019)
Bhaskar Vundurthy, K. Sridharan
Time Optimal Rendezvous for Multi-Agent Systems Amidst Obstacles - Theory and Experiments. IECON (2018)
Yashrajsinh Parmar, K. Sridharan
Hardware-Efficient Velocity Estimation of Dynamic Obstacles Based on a Novel Radix-4 CORDIC and FPGA Implementation. IECON (2018)
Bodapati Srinivasu, K. Sridharan
A Transistor-Level Probabilistic Approach for Reliability Analysis of Arithmetic Circuits With Applications to Emerging Technologies. IEEE Trans. Reliab. 66 (2) (2017)
B. Srinivasu, K. Sridharan
A Synthesis Methodology for Ternary Logic Circuits in Emerging Device Technologies. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2017)
Vikramkumar Pudi, K. Sridharan, Fabrizio Lombardi
Majority Logic Formulations for Parallel Adder Designs at Reduced Delay and Circuit Complexity. IEEE Trans. Computers 66 (10) (2017)
Bodapati Srinivasu, K. Sridharan
Carbon nanotube FET-based low-delay and low-power multi-digit adder designs. IET Circuits Devices Syst. 11 (4) (2017)
Tahiyah Nou Shene, K. Sridharan, N. Sudha
Real-Time SURF-Based Video Stabilization System for an FPGA-Driven Mobile Robot. IEEE Trans. Ind. Electron. 63 (8) (2016)
Bodapati Srinivasu, K. Sridharan
Low-Complexity Multiternary Digit Multiplier Design in CNTFET Technology. IEEE Trans. Circuits Syst. II Express Briefs (8) (2016)
Vikramkumar Pudi, K. Sridharan
A Bit-Serial Pipelined Architecture for High-Performance DHT Computation in Quantum-Dot Cellular Automata. IEEE Trans. Very Large Scale Integr. Syst. 23 (10) (2015)
Tahiyah Nou Shene, Vikramkumar Pudi, K. Sridharan, Vineetha Thomas, J. Arthi
Very large-scale integration architecture for video stabilisation and implementation on a field programmable gate array-based autonomous vehicle. IET Comput. Vis. 9 (4) (2015)
N. Sudha, K. Sridharan, Dan Wilkinson
A pipelined architecture for motion tracking on a multicore environment. ISIC (2014)
Vikram Pudi, K. Sridharan
New Decomposition Theorems on Majority Logic for Low-Delay Adder Designs in Quantum Dot Cellular Automata. IEEE Trans. Circuits Syst. II Express Briefs (10) (2012)
Vikram Pudi, K. Sridharan
Efficient Design of a Hybrid Adder in Quantum-Dot Cellular Automata. IEEE Trans. Very Large Scale Integr. Syst. 19 (9) (2011)
B. Sandeep Kumar, Vikram Pudi, K. Sridharan
Efficient VLSI Architectures for the Hadamard Transform Based on Offset-Binary Coding and ROM Decomposition. ISVLSI (2011)
Leena Vachhani, K. Sridharan
Robotic mapping with simple sensing and processing hardware - Algorithm and architecture. ICARCV (2010)
Leena Vachhani, K. Sridharan, Pramod Kumar Meher
Efficient FPGA Realization of CORDIC With Application to Robotic Exploration. IEEE Trans. Ind. Electron. 56 (12) (2009)
Pramod Kumar Meher, Javier Valls, Tso-Bing Juang, K. Sridharan, Koushik Maharatna
50 Years of CORDIC: Algorithms, Architectures, and Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2009)
Leena Vachhani, K. Sridharan, Pramod Kumar Meher
Efficient CORDIC Algorithms and Architectures for Low Area and High Throughput Implementation. IEEE Trans. Circuits Syst. II Express Briefs (1) (2009)
Leena Vachhani, K. Sridharan
Hardware-Efficient Prediction-Correction-Based Generalized-Voronoi-Diagram Construction and FPGA Implementation. IEEE Trans. Ind. Electron. 55 (4) (2008)
P. Rajesh Kumar, K. Sridharan
VLSI-Efficient Scheme and FPGA Realization for Robotic Mapping in a Dynamic Environment. IEEE Trans. Very Large Scale Integr. Syst. 15 (1) (2007)
K. Sridharan, T. K. Priya
A Hardware Accelerator and FPGA Realization for Reduced Visibility Graph Construction Using Efficient Bit Representations. IEEE Trans. Ind. Electron. 54 (3) (2007)
T. K. Priya, K. Sridharan
A parallel algorithm, architecture and FPGA realization for high speed determination of the complete visibility graph for convex objects. Microprocess. Microsystems 30 (1) (2006)
T. K. Priya, P. Rajesh Kumar, K. Sridharan
A hardware-efficient scheme and FPGA realization for computation of single pair shortest path for a mobile automaton. Microprocess. Microsystems 30 (7) (2006)
P. Rajesh Kumar, K. Sridharan, S. Srinivasan
A parallel algorithm, architecture and FPGA realization for landmark determination and map construction in a planar unknown environment. Parallel Comput. 32 (3) (2006)
K. Sridharan, T. K. Priya
The Design of a Hardware Accelerator for Real-Time Complete Visibility Graph Construction and Efficient FPGA Implementation. IEEE Trans. Ind. Electron. 52 (4) (2005)
Siew Kei Lam, K. Sridharan, Thambipillai Srikanthan
VLSI-efficient schemes for high-speed construction of tangent graph. Robotics Auton. Syst. 51 (4) (2005)
K. Sridharan, T. K. Priya
A parallel algorithm for constructing reduced visibility graph and its FPGA implementation. J. Syst. Archit. 50 (10) (2004)
Siew Kei Lam, K. Sridharan, Thambipillai Srikanthan
Hardware-efficient schemes for logarithmic approximation and binary search with application to visibility graph construction. IEEE Trans. Ind. Electron. 51 (6) (2004)
Natarajan Sudha, K. Sridharan
A high-speed VLSI design and ASIC implementation for constructing Euclidean distance-based discrete Voronoi diagram. IEEE Trans. Robotics Autom. 20 (2) (2004)
T. K. Priya, K. Sridharan
An Efficient Algorithm to Construct Reduced Visibility Graph and Its FPGA Implementation. VLSI Design (2004)
K. Sridharan
A course on web languages and web-based applications. IEEE Trans. Educ. 47 (2) (2004)
K. Sridharan
Efficient computation of a measure of depth between convex objects for graphics applications. Comput. Graph. 26 (5) (2002)
B. Rajesh Kumar, K. Sridharan, K. Srinivasan
The design and development of a web-based data acquisition system. IEEE Trans. Instrum. Meas. 51 (3) (2002)
K. Sridharan, S. Sathiya Keerthi
Computation of a penetration measure between 3D convex polyhedral objects for collision detection. J. Field Robotics 18 (11) (2001)
K. Sridharan
Teaching computer graphics and robotics using symbolic computation software. Comput. Appl. Eng. Educ. 8 (1) (2000)
K. Sridharan, Harry E. Stephanou
Fuzzy distances for proximity characterization under uncertainty. Fuzzy Sets Syst. 103 (3) (1999)
N. Sudha, Sukumar Nandi, K. Sridharan
A Parallel Algorithm to Construct Voronoi Diagram and Its VLSI Architecture. ICRA (1999)
K. Sridharan
Computing two penetration measures for curved 2D objects. Inf. Process. Lett. 72 (3-4) (1999)
K. Sridharan
Computation of penetration measures for convex polygons and polyhedra for graphics applications. HiPC (1998)
K. Sridharan, Harry E. Stephanou
Algorithms for Rapid Computation of Some Distance Functions Between Objects for Path Planning. ICRA (1994)
K. Sridharan, Harry E. Stephanou, K. C. Craig, S. Sathiya Keerthi
Distance Measures on Intersecting Objects and Their Applications. Inf. Process. Lett. 51 (4) (1994)
K. Sridharan, Harry E. Stephanou, S. Sathiya Keerthi
On Computing a Distance Measure for Path Planning. ICRA (1) (1993)
K. Sridharan, Harry E. Stephanou
Fuzzy Distance Functions for Motion Planning. ICTAI (1992)