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A Resource-Efficient Multiplierless Systolic Array Architecture for Convolutions in Deep Networks.
Yashrajsinh Parmar
K. Sridharan
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2020)
Keyphrases
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systolic array
parallel architecture
reconfigurable architecture
data flow
real time
resource management
management system
resource allocation
network structure
complex networks
network architecture