Marcelo Lubaszewski

Publication Activity (10 Years)

Years Active: 1992-2020
Publications (10 Years): 4

Top Venues

SBCCI

ISVLSI

LATS

IEEE RFID

Publications

João Carlos Britto Filho, Marcelo Lubaszewski
A Highly Reliable Wearable Device for Fall Detection. LATS (2020)
E. Petitprez, Dalton M. Colombo, Felipe M. Henes, Laurent Courcelle, R. Tararam, S. Jacobsen, R. Soares, C. Krug, Marcelo Lubaszewski
Successful prototyping of complex integrated circuits with focused ion beam. SBCCI (2016)
Rafael Cantalice, Alexandre Simionovski, Fernando Paixão Cortes, Marcelo Lubaszewski
Low power, high-sensitivity clock recovery circuit for LF/HF RFID applications. SBCCI (2015)
Francisco O. O. Gomes, Luciano de Paula, Joao C. S. Santos, Laurent Courcelle, Daniel Piovani, Filipe Viera, Felipe M. Henes, Marcelo Lubaszewski
A low-power RFID enabled temperature sensor for cold chain management. ISCAS (2015)
Fernando da Rocha Paixão Cortes, Juan Pablo Martinez Brito, Everton Ghignatti, Alfredo Olmos, Fernando Chávez, Marcelo Lubaszewski
A power management system architecture for LF passive RFID tags. LASCAS (2014)
Fernando Paixão Cortes, Juan Pablo Martinez Brito, Rafael Cantalice, Everton Ghignatti, Alfredo Olmos, Fernando Chávez, Marcelo Lubaszewski
A low-power RF/analog front-end architecture for LF passive RFID tags with dynamic power sensing. IEEE RFID (2014)
Alexandre M. Amory, Edson I. Moreno, Fernando Moraes, Marcelo Lubaszewski
Determining the test sources/sinks for NoC TAMs. ISVLSI (2013)
Lucas A. Tambara, Fernanda Lima Kastensmidt, Paolo Rech, Tiago R. Balen, Marcelo Lubaszewski
Neutron-induced single event effects analysis in a SAR-ADC architecture embedded in a mixed-signal SoC. ISVLSI (2013)
Marcelo de Souza Moraes, Marcos Barcellos Hervé, Marcelo Lubaszewski
Low pin count DfT technique for RFID ICs. DFT (2012)
Alexandre M. Amory, Luciano Ost, César A. M. Marcon, Fernando Gehm Moraes, Marcelo Lubaszewski
Evaluating energy consumption of homogeneous MPSoCs using spare tiles. DATE (2011)
Caroline Concatto, João Almeida, Guilherme Fachini, Marcos Herve, Fernanda Lima Kastensmidt, Érika F. Cota, Marcelo Lubaszewski
Improving the yield of NoC-based systems through fault diagnosis and adaptive routing. J. Parallel Distributed Comput. 71 (5) (2011)
Renato P. Ribas, Simone Bavaresco, N. Schuch, Vinicius Callegaro, Marcelo Lubaszewski, André Inácio Reis
Contributions to the evaluation of ensembles of combinational logic gates. Microelectron. J. 42 (2) (2011)
Alexandre M. Amory, Cristiano Lazzari, Marcelo Lubaszewski, Fernando Gehm Moraes
Early estimation of wire length for dedicated test access mechanisms in networks-on-chip based SoCs. SBCCI (2011)
Marcos Barcellos Hervé, Marcelo de Souza Moraes, Pedro Almeida, Marcelo Lubaszewski, Fernanda Lima Kastensmidt, Érika F. Cota
Functional Test of Mesh-Based NoCs with Deterministic Routing: Integrating the Test of Interconnects and Routers. J. Electron. Test. 27 (5) (2011)
Alexandre M. Amory, Cristiano Lazzari, Marcelo Lubaszewski, Fernando Gehm Moraes
A new test scheduling algorithm based on Networks-on-Chip as Test Access Mechanisms. J. Parallel Distributed Comput. 71 (5) (2011)
Luiz Fernando Gonçalves, Jefferson Luiz Bosa, Tiago Roberto Balen, Marcelo Lubaszewski, Eduardo Luis Schneider, Renato V. B. Henriques
Fault Detection, Diagnosis and Prediction in Electrical Valves Using Self-Organizing Maps. J. Electron. Test. 27 (4) (2011)
Alexandre M. Amory, César A. M. Marcon, Fernando Gehm Moraes, Marcelo Lubaszewski
Task mapping on NoC-based MPSoCs with faulty tiles: Evaluating the energy consumption and the application execution time. International Symposium on Rapid System Prototyping (2011)
Marcelo Lubaszewski, Érika F. Cota
Special session 12B: Embedded tutorial test and fault tolerance of networks-on-chip. VTS (2010)
Marcos Hervé, Pedro Almeida, Fernanda Lima Kastensmidt, Érika F. Cota, Marcelo Lubaszewski
Concurrent test of Network-on-Chip interconnects and routers. LATW (2010)
Gabriel de M. Borges, Luiz Fernando Gonçalves, Tiago R. Balen, Marcelo Lubaszewski
Diversity TMR: Proof of concept in a mixed-signal case. LATW (2010)
Matheus Braga, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski
Efficiently using data splitting and retransmission to tolerate faults in networks-on-chip interconnects. ISCAS (2010)
Gabriel de M. Borges, Luiz Fernando Gonçalves, Tiago R. Balen, Marcelo Lubaszewski
Evaluating the effectiveness of a mixed-signal TMR scheme based on design diversity. SBCCI (2010)
Gabriel de M. Borges, Luiz Fernando Gonçalves, Tiago R. Balen, Marcelo Lubaszewski
Increasing reliability of programmable mixed-signal systems by applying design diversity redundancy. ETS (2010)
Tiago R. Balen, Marcelo Lubaszewski
Radiation effects on programmable analog devices and mitigation techniques. IOLTS (2010)
Luiz Fernando Gonçalves, Eduardo Luis Schneider, Renato Ventura Bayan Henriques, Marcelo Lubaszewski, Jefferson Luiz Bosa, Paulo Martins Engel
Fault prediction in electrical valves using temporal Kohonen maps. LATW (2010)
Mariza Botelho, Fernanda Lima Kastensmidt, Marcelo Lubaszewski, Érika F. Cota, Luigi Carro
A broad strategy to detect crosstalk faults in network-on-chip interconnects. VLSI-SoC (2010)
Caroline Concatto, Pedro Almeida, Fernanda Lima Kastensmidt, Érika F. Cota, Marcelo Lubaszewski, Marcos Herve
Improving yield of torus nocs through fault-diagnosis-and-repair of interconnect faults. IOLTS (2009)
Luiz Fernando Gonçalves, Jefferson Luiz Bosa, Renato V. B. Henriques, Marcelo Lubaszewski
Design of an embedded system for the proactive maintenance of electrical valves. SBCCI (2009)
Marcelo Lubaszewski
Can Functional Test Achieve Low-cost Full Coverage of NoC Faults? DFT (2009)
Franco Leite, Tiago R. Balen, Marcos Hervé, Marcelo Lubaszewski, Gilson I. Wirth
Using Bulk Built-In Current Sensors and recomputing techniques to mitigate transient faults in microprocessors. LATW (2009)
Érika F. Cota, Luigi Carro, Felipe Pinto, Ricardo Augusto da Luz Reis, Marcelo Lubaszewski
Resource-and-time-aware test strategy for configurable quaternary logic blocks. SBCCI (2009)
Renato P. Ribas, Simone Bavaresco, Marcelo Lubaszewski, André Inácio Reis
Efficient Test Circuit to Qualify Logic Cells. ISCAS (2009)
Marcelo Lubaszewski, Andrew Richardson, C. C. Su
Guest editorial. Microelectron. J. 40 (7) (2009)
Marcos Barcellos Hervé, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski
NoC interconnection functional testing: Using boundary-scan to reduce the overall testing time. LATW (2009)
Marcos Herve, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski
Diagnosis of interconnect shorts in mesh NoCs. NOCS (2009)
Felipe Ghellar, Marcelo Lubaszewski
A novel AES cryptographic core highly resistant to differential power analysis attacks. SBCCI (2008)
Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, Maico Cassel, Marcos Herve, Pedro Almeida, Paulo Meirelles, Alexandre M. Amory, Marcelo Lubaszewski
A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip. IEEE Trans. Computers 57 (9) (2008)
Carlos Roberto Moratelli, Felipe Ghellar, Érika F. Cota, Marcelo Lubaszewski
A fault-tolerant, DFA-resistant AES core. ISCAS (2008)
Bozena Kaminska, Marcelo Lubaszewski, José Machado da Silva
Selected Papers from the International Mixed Signals Testing and GHz/Gbps Test Workshop. VLSI Design 2008 (2008)
Alexandre M. Amory, Frederico Ferlini, Marcelo Lubaszewski, Fernando Moraes
DfT for the Reuse of Networks-on-Chip as Test Access Mechanism. VTS (2007)
Tiago R. Balen, Fernanda Lima Kastensmidt, Marcelo Lubaszewski, Michel Renovell
Single Event Upset in SRAM-based Field Programmable Analog Arrays: Effects and Mitigation. ISVLSI (2007)
Marcelo Lubaszewski, Andrew Richardson, C. C. Su
Guest Editorial. J. Electron. Test. 23 (6) (2007)
Alexandre M. Amory, Kees Goossens, Erik Jan Marinissen, Marcelo Lubaszewski, Fernando Moraes
Wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism. IET Comput. Digit. Tech. 1 (3) (2007)
Tiago R. Balen, José Vicente Calvano, Marcelo Lubaszewski, Michel Renovell
Built-In Self-Test of Field Programmable Analog Arrays based on Transient Response Analysis. J. Electron. Test. 23 (6) (2007)
Érika F. Cota, Fernanda Lima Kastensmidt, Maico Cassel, Paulo Meirelles, Alexandre M. Amory, Marcelo Lubaszewski
Redefining and testing interconnect faults in Mesh NoCs. ITC (2007)
Alexandre M. Amory, Marcelo Lubaszewski, Fernando Gehm Moraes, Edson I. Moreno
Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture CoRR (2007)
Alexandre M. Amory, Kees Goossens, Erik Jan Marinissen, Marcelo Lubaszewski, Fernando Moraes
Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism. ETS (2006)
Tiago R. Balen, José Vicente Calvano, Marcelo Lubaszewski, Michel Renovell
Functional Test of Field Programmable Analog Arrays. VTS (2006)
Margrit R. Krug, Marcelo Lubaszewski, Marcelo de Souza Moraes
Improving ATPG Gate-Level Fault Coverage by using Test Vectors generated from Behavioral HDL Descriptions. VLSI-SoC (2006)
Carlos Roberto Moratelli, Érika F. Cota, Marcelo Lubaszewski
A cryptography core tolerant to DFA fault attacks. SBCCI (2006)
Margrit R. Krug, Marcelo de Souza Moraes, Marcelo Lubaszewski
Using a software testing technique to identify registers for partial scan implementation. SBCCI (2006)
Antonio Andrade Jr., Gustavo Vieira, Tiago R. Balen, Marcelo Lubaszewski, Florence Azaïs, Michel Renovell
Built-in self-test of global interconnects of field programmable analog arrays. Microelectron. J. 36 (12) (2005)
Alexandre M. Amory, Marcelo Lubaszewski, Fernando Gehm Moraes, Edson I. Moreno
Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture. DATE (2005)
Gustavo Pereira, Antonio Andrade Jr., Tiago R. Balen, Marcelo Lubaszewski, Florence Azaïs, Michel Renovell
Testing the Interconnect Networks and I/O Resources of Field Programmable Analog Arrays. VTS (2005)
Marcelo de Souza Moraes, Érika F. Cota, Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski
A constraint-based solution for on-line testing of processors embedded in real-time applications. SBCCI (2005)
Florence Azaïs, Marcelo Lubaszewski, Pascal Nouet, Michel Renovell
A Strategy for Optimal Test Point Insertion in Analog Cascaded Filters. J. Electron. Test. 21 (1) (2005)
Alexandre M. Amory, Eduardo Wenzel Brião, Érika F. Cota, Marcelo Lubaszewski, Fernando Gehm Moraes
A scalable test strategy for network-on-chip routers. ITC (2005)
Tiago R. Balen, Antonio Q. Andrade, Florence Azaïs, Marcelo Lubaszewski, Michel Renovell
Applying the Oscillation Test Strategy to FPAA's Configurable Analog Blocks. J. Electron. Test. 21 (2) (2005)
Tiago R. Balen, Antonio Andrade Jr., Florence Azaïs, Marcelo Lubaszewski, Michel Renovell
An Approach to the Built-In Self-Test of Field Programmable Analog Arrays. VTS (2004)
Marcelo Lubaszewski, José Luis Huertas
Test and Design-for-Test of Mixed-Signal Integrated Circuits. IFIP Congress Tutorials (2004)
Tiago R. Balen, Antonio Andrade Jr., Florence Azaïs, Michel Renovell, Marcelo Lubaszewski
Testing the Configurable Analog Blocks of Field Programmable Analog Arrays. ITC (2004)
Alexandre M. Amory, Érika F. Cota, Marcelo Lubaszewski, Fernando Gehm Moraes
Reducing test time with processor reuse in network-on-chip based systems. SBCCI (2004)
Alex Gonsales, Marcelo Lubaszewski, Luigi Carro, Michel Renovell
A New FPGA for DSP Applications Integrating BIST Capabilities. J. Electron. Test. 20 (4) (2004)
Érika F. Cota, Luigi Carro, Marcelo Lubaszewski, Alex Orailoglu
Searching for Global Test Costs Optimization in Core-Based Systems. J. Electron. Test. 20 (4) (2004)
Antonio Andrade Jr., Érika F. Cota, Marcelo Lubaszewski
Improving mixed-signal SOC testing: a power-aware reuse-based approach with analog BIST. SBCCI (2004)
Érika F. Cota, Luigi Carro, Marcelo Lubaszewski
Reusing an on-chip network for the test of core-based systems. ACM Trans. Design Autom. Electr. Syst. 9 (4) (2004)
José Vicente Calvano, Marcelo Lubaszewski
Designing for Test Analog Signal Processors for MEMS-Based Inertial Sensors. IWSOC (2003)
Érika F. Cota, Márcio Eduardo Kreutz, Cesar A. Zeferino, Luigi Carro, Marcelo Lubaszewski, Altamiro Amadeu Susin
The Impact of NoC Reuse on the Testing of Core-based Systems. VTS (2003)
Érika F. Cota, Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski
Power-aware NoC Reuse on the Testing of Core-based Systems. ITC (2003)
Vinícius P. Correia, Marcelo Lubaszewski, André Inácio Reis
SIFU! - A Didactic Stuck-at Fault Simulator. MSE (2003)
L. Cassol, O. Betat, Luigi Carro, Marcelo Lubaszewski
The SigmaDelta-BIST Method Applied to Analog Filters. J. Electron. Test. 19 (1) (2003)
José Vicente Calvano, Vladimir Castro Alves, Marcelo Lubaszewski, Antonio Carneiro de Mesquita Filho
Designing for Test Butterworth and Chebyshev Low-Pass Filters of Any Order. LATW (2002)
José Vicente Calvano, Vladimir Castro Alves, Antonio Carneiro de Mesquita Filho, Marcelo Lubaszewski
Filters Designed for Testability Wrapped on the Mixed-Signal Test Bus. VTS (2002)
José Vicente Calvano, Antonio Carneiro de Mesquita Filho, Marcelo Lubaszewski, Vladimir Castro Alves
State Model Approach for Analog Fault Modeling. LATW (2002)
Alex Gonsales, Marcelo Lubaszewski, Luigi Carro, Michel Renovell
A New FPGA for DSP Applications Integrating BIST Capabilities. LATW (2002)
Érika F. Cota, Luigi Carro, Alex Orailoglu, Marcelo Lubaszewski
Generic and Detailed Search for TAM Definition in Core-Based Systems. LATW (2002)
Felipe S. Marques, Vinícius P. Correia, A. Prado, Marcelo Lubaszewski, André Inácio Reis
Testability Properties of BDDs. SBCCI (2002)
Érika F. Cota, Luigi Carro, Marcelo Lubaszewski, Alex Orailoglu
Test Planning and Design Space Exploration in a Core-Based Environment. DATE (2002)
Florence Azaïs, Serge Bernard, Yves Bertrand, Mariane Comte, Michel Renovell, Marcelo Lubaszewski
Estimating Static Parameters of A-to-D Converters from Spectral Analysis. LATW (2002)
José Vicente Calvano, Antonio Carneiro de Mesquita Filho, Vladimir Castro Alves, Marcelo Lubaszewski
Filter Sensitivity Analysis Using the TRAM. LATW (2001)
Érika F. Cota, Luigi Carro, Marcelo Lubaszewski
A Test Method for a Broad Class of DSP Circuits. LATW (2001)
Érika F. Cota, Fernanda Lima, Sana Rezgui, Luigi Carro, Raoul Velazco, Marcelo Lubaszewski, Ricardo Reis
Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults. J. Electron. Test. 17 (2) (2001)
André C. Nácul, Luigi Carro, Daniel Janner, Marcelo Lubaszewski
A BIST Procedure for Analog Mixers in Software Radio. SBCCI (2001)
L. Cassol, Luigi Carro, Marcelo Lubaszewski
The Sigma-Delta-Bist Method Applied to Linear Analog Circuits. LATW (2001)
José Vicente Calvano, Vladimir Castro Alves, Marcelo Lubaszewski, Antonio Carneiro de Mesquita Filho
Designing Testable Networks for Transfer Function Realization. LATW (2001)
José Vicente Calvano, Antonio Carneiro de Mesquita Filho, Vladimir Castro Alves, Marcelo Lubaszewski
Fault Models and Test Generation for OpAmp Circuits - The FFM. J. Electron. Test. 17 (2) (2001)
Luigi Carro, André C. Nácul, Daniel Janner, Marcelo Lubaszewski
Built-in Test of Analog Non-Linear Circuits in a SOC Environment. VLSI-SOC (2001)
Bernard Courtois, Salvador Mir, Benoît Charlot, Marcelo Lubaszewski
An Analog-based Approach for MEMS Testing. LATW (2001)
Marcelo Lubaszewski, Víctor H. Champac
Guest Editorial. J. Electron. Test. 17 (2) (2001)
Renato P. Ribas, André Inácio Reis, Marcelo Lubaszewski
Concepção de Circuitos e Sistemas Integrados. RITA 8 (1) (2001)
Luigi Carro, Luciano Agostini, Roberto Pacheco, Marcelo Lubaszewski
Using Reconfigurability Features to Break Down Test Costs: a Case Study. LATW (2000)
Érika F. Cota, Marcelo Negreiros, Luigi Carro, Marcelo Lubaszewski
A new adaptive analog test and diagnosis system. IEEE Trans. Instrum. Meas. 49 (2) (2000)
Fernanda Gusmão de Lima, Eduardo D'Avila, Mauricio Moraes, Marcelo Lubaszewski, Ricardo Reis
A Self-Testing Mask Programmable Matrix Using Built-in Current Sensing. LATW (2000)
Fernanda Gusmão de Lima, Érika F. Cota, Luigi Carro, Marcelo Lubaszewski, Ricardo Reis, Raoul Velazco, Sana Rezgui
Designing a Radiation Hardened 8051-Like Micro-Controller. SBCCI (2000)
José Vicente Calvano, Vladimir Castro Alves, Marcelo Lubaszewski
Testing a PWM circuit using functional fault models and compact test vectors for operational amplifiers. Asian Test Symposium (2000)
Luigi Carro, Michel Renovell, Érika F. Cota, Marcelo Lubaszewski, Yves Bertrand, Florence Azaïs
On the Temperature Dependencies of Analog BIST. LATW (2000)
José Vicente Calvano, Vladimir Castro Alves, Marcelo Lubaszewski
Fault Detection Methodology and BIST Method for 2nd Order Butterworth, Chebyshev and Bessel Filter Approximations. VTS (2000)
André Inácio Reis, A. Prado, Marcelo Lubaszewski
Testability Properties of Vertex Precedent BDDs. SBCCI (2000)
Margrit Reni Krug, Marcelo Lubaszewski, José Manuel Martins Ferreira, Gustavo Ribeiro da Costa Alves
Implementing a Self-Checking PROFIBUS Slave. LATW (2000)
Érika F. Cota, Marcelo Lubaszewski, Raoul Velasco, Sana Rezgui
Synthesis of a 8051-Like Microcontroller Tolerant to Transient Faults. LATW (2000)

Marcelo Lubaszewski.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Marcelo Lubaszewski