DfT for the Reuse of Networks-on-Chip as Test Access Mechanism.

Alexandre M. Amory Frederico Ferlini Marcelo Lubaszewski Fernando Moraes

Published in: VTS (2007)

Keyphrases

high speed
low cost
high bandwidth
complex networks
computer networks
network analysis
neural network
social networks
network structure
built in self test
real time
analog vlsi
heterogeneous networks
network design
frequency domain
access control
test cases
learning objects
bayesian networks