Fernanda Gusmão de Lima Kastensmidt

Publication Activity (10 Years)

Years Active: 2002-2016
Publications (10 Years): 1

Top Topics

Parameter Identification

Power Dissipation

Fault Tolerance

Top Venues

Publications

Jorge L. Tonfat, Lucas A. Tambara, André Flores dos Santos, Fernanda Gusmão de Lima Kastensmidt
Method to Analyze the Susceptibility of HLS Designs in SRAM-Based FPGAs Under Soft Errors. ARC (2016)
Anderson Luiz Sartor, Arthur Francisco Lorenzon, Luigi Carro, Fernanda Gusmão de Lima Kastensmidt, Stephan Wong, Antonio Carlos Schneider Beck
A Novel Phase-Based Low Overhead Fault Tolerance Approach for VLIW Processors. ISVLSI (2015)
Felipe Rosa, Raphael Martins Brum, Gilson I. Wirth, Fernanda Gusmão de Lima Kastensmidt, Luciano Ost, Ricardo Reis
Impact of dynamic voltage scaling and thermal factors on SRAM reliability. Microelectron. Reliab. 55 (9-10) (2015)
Giovanni Bruni, Paolo Rech, Lucas A. Tambara, Gabriel L. Nazar, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Alessandro Paccagnella
Power dissipation effects on 28nm FPGA-based System on Chips neutron sensitivity. VLSI-SoC (2014)
Raul Chipana, Fernanda Gusmão de Lima Kastensmidt
SET Susceptibility Analysis of Clock Tree and Clock Mesh Topologies. ISVLSI (2014)
Iuri A. C. Gomes, Fernanda Gusmão de Lima Kastensmidt
Reducing TMR overhead by combining approximate circuit, transistor topology and input permutation approaches. SBCCI (2013)
Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Márcio Eduardo Kreutz, Fernanda Gusmão de Lima Kastensmidt, Altamiro Amadeu Susin
A NOC closed-loop performance monitor and adapter. Microprocess. Microsystems 37 (6-7) (2013)
Víctor H. Champac, Fernanda Gusmão de Lima Kastensmidt, Letícia Maria Veiras Bolzani Poehls, Fabian Vargas, Yervant Zorian
12th "IEEE Latin-American Test Workshop" Porto de Galinhas, Brazil, 27-30 March 2011. J. Low Power Electron. 7 (4) (2011)
Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, Maico Cassel, Marcos Herve, Pedro Almeida, Paulo Meirelles, Alexandre M. Amory, Marcelo Lubaszewski
A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip. IEEE Trans. Computers 57 (9) (2008)
Carlos Arthur Lang Lisbôa, Fernanda Gusmão de Lima Kastensmidt, Luigi Carro
Analyzing the effects of the granularity of recomputation based techniques to cope with radiation induced soft errors. WREFT@CF (2008)
Gilson I. Wirth, Michele G. Vieira, Fernanda Gusmão de Lima Kastensmidt
Accurate and computer efficient modelling of single event transients in CMOS circuits. IET Circuits Devices Syst. 1 (2) (2007)
Gustavo Neuberger, Gilson I. Wirth, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis
Statistical Analysis of Normality of Systematic and Random Variability of Flip-Flop Race Immunity in 130nm and 90nm CMOS Technologies. VLSI-SoC (Selected Papers) (2007)
Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Gilson I. Wirth, Ralf Brederlow, Christian Pacha
Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies. VLSI-SoC (2007)
Gilson I. Wirth, Michele G. Vieira, Egas Henes Neto, Fernanda Gusmão de Lima Kastensmidt
Generation and Propagation of Single Event Transients in CMOS Circuits. DDECS (2006)
Gilson I. Wirth, Ivandro Ribeiro, Michele G. Vieira, Fernanda Gusmão de Lima Kastensmidt
Single event transients in dynamic logic. SBCCI (2006)
Álisson Michels, Lorenzo Petroli, Carlos Arthur Lang Lisbôa, Fernanda Gusmão de Lima Kastensmidt, Luigi Carro
SET Fault Tolerant Combinational Circuits Based on Majority Logic. DFT (2006)
Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis
An Automatic Technique for Optimizing Reed-Solomon Codes to Improve Fault Tolerance in Memories. IEEE Des. Test Comput. 22 (1) (2005)
Gilson I. Wirth, Michele G. Vieira, Egas Henes Neto, Fernanda Gusmão de Lima Kastensmidt
Single event transients in combinatorial circuits. SBCCI (2005)
Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Luigi Carro, Ricardo Augusto da Luz Reis
A multiple bit upset tolerant SRAM memory. ACM Trans. Design Autom. Electr. Syst. 8 (4) (2003)
Fernanda Gusmão de Lima Kastensmidt, Luigi Carro, Raoul Velazco, Ricardo Augusto da Luz Reis
Injecting Multiple Upsets in a SEU Tolerant 8051 Micro-Controller. IOLTW (2002)