Login / Signup
A multiple bit upset tolerant SRAM memory.
Gustavo Neuberger
Fernanda Gusmão de Lima Kastensmidt
Luigi Carro
Ricardo Augusto da Luz Reis
Published in:
ACM Trans. Design Autom. Electr. Syst. (2003)
Keyphrases
</>
random access memory
low power
neural network
genetic algorithm
power consumption
main memory
memory requirements
data transmission
virtual memory