A low-power RF/analog front-end architecture for LF passive RFID tags with dynamic power sensing.
Fernando Paixão CortesJuan Pablo Martinez BritoRafael CantaliceEverton GhignattiAlfredo OlmosFernando ChávezMarcelo LubaszewskiPublished in: IEEE RFID (2014)
Keyphrases
- low power
- power consumption
- rfid tags
- vlsi architecture
- rfid reader
- mixed signal
- radio frequency identification
- low cost
- high power
- image sensor
- vlsi circuits
- single chip
- radio frequency
- power saving
- high speed
- cmos technology
- rfid systems
- rfid technology
- real time
- digital signal processing
- power reduction
- nm technology
- security issues
- power dissipation
- logic circuits
- cost effective
- cmos image sensor
- low power consumption
- security mechanisms
- resource constrained
- multi channel
- signal processor
- cellular networks
- mobile phone
- sensor networks