José Luis Huertas

Publication Activity (10 Years)

Years Active: 1978-2016
Publications (10 Years): 1

Top Topics

Electronic Circuits

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Andrés Maldonado, Gloria Huertas, Adoración Rueda, José Luis Huertas, Pablo Pérez, Alberto Yufera
Cell-culture measurements using voltage oscillations. LASCAS (2016)
Gloria Huertas, Andrés Maldonado, Alberto Yufera, Adoración Rueda, José Luis Huertas
The Bio-Oscillator: A Circuit for Cell-Culture Assays. IEEE Trans. Circuits Syst. II Express Briefs (2) (2015)
Manuel J. Barragan Asian, Gildas Léger, José Luis Huertas
Multi-condition alternate test of analog, mixed-signal, and RF systems. LATW (2012)
Manuel J. Barragan Asian, Gloria Huertas, Adoración Rueda, José Luis Huertas
(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems. DELTA (2010)
Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vázquez, Adoración Rueda, José Luis Huertas
Low-cost signature test of RF blocks based on envelope response analysis. ETS (2010)
Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vázquez, Adoración Rueda, José Luis Huertas
A BIST Solution for the Functional Characterization of RF Systems Based on Envelope Response Analysis. Asian Test Symposium (2009)
Rafaella Fiorelli, Fernando Silveira, Eduardo J. Peralías, Diego Vázquez, Adoración Rueda, José Luis Huertas
A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model. SBCCI (2008)
Gloria Huertas, José Luis Huertas
Oscillation-Based Test in Data Converters: On-Line Monitoring. DELTA (2008)
John M. Espinosa-Duran, Jaime Velasco-Medina, Gloria Huertas, José Luis Huertas
Total ionizing dose effects in switched-capacitor filters using oscillation-based test. SBCCI (2007)
Francisco Serra-Graells, José Luis Huertas
Low-Voltage CMOS subthreshold log-domain filtering. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2005)
Diego Vázquez, Gloria Huertas, África Luque, Manuel J. Barragan Asian, Gildas Léger, Adoración Rueda, José Luis Huertas
Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST. J. Electron. Test. 21 (3) (2005)
Adoración Rueda, Michel Renovell, José Luis Huertas
Guest Editorial. J. Electron. Test. 21 (3) (2005)
Marcelo Lubaszewski, José Luis Huertas
Test and Design-for-Test of Mixed-Signal Integrated Circuits. IFIP Congress Tutorials (2004)
José Luis Huertas
Test and design-for-test of mixed-signal integrated circuits. SBCCI (2004)
Francisco Serra-Graells, Lluís Gómez, José Luis Huertas
A true-1-V 300-μW CMOS-subthreshold log-domain hearing-aid-on-chip. IEEE J. Solid State Circuits 39 (8) (2004)
Gildas Léger, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2004)
Francisco Serra-Graells, José Luis Huertas
Sub-1-V CMOS proportional-to-absolute temperature references. IEEE J. Solid State Circuits 38 (1) (2003)
Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
Practical Oscillation-Based Test of Integrated Filters. IEEE Des. Test Comput. 19 (6) (2002)
Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell. IEEE Des. Test Comput. 19 (6) (2002)
Manuel Martínez, Maria José Avedillo, José M. Quintana, José Luis Huertas
COPAS: A New Algorithm for the Partial Input Encoding Problem. VLSI Design 2002 (2) (2002)
José M. Quintana, Maria J. Avedillo, José Luis Huertas
Efficient Realization of a Threshold Voter for Self-Purging Redundancy. J. Electron. Test. 17 (1) (2001)
Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters. J. Electron. Test. 17 (5) (2001)
Chin-Long Wey, Adam Osseiran, José Luis Huertas, Yeon-Chen Nieu
Mixed-Signal SoC Testing: Is Mixed-Signal Design-for-Test on Its Way. Asian Test Symposium (2000)
T. A. García, Antonio J. Acosta, J. M. Mora, J. Ramos, José Luis Huertas
Self-Timed Boundary-Scan Cells for Multi-Chip Module Test. J. Electron. Test. 15 (1-2) (1999)
Diego Vázquez, Adoración Rueda, José Luis Huertas, Eduardo J. Peralías
A high-Q bandpass fully differential SC filter with enhanced testability. IEEE J. Solid State Circuits 33 (7) (1998)
Salvador Mir, Adoración Rueda, Diego Vázquez, José Luis Huertas
Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems. DATE (1998)
Iluminada Baturone, Santiago Sánchez-Solano, Angel Barriga, José Luis Huertas
Implementation of CMOS fuzzy controllers as mixed-signal integrated circuits. IEEE Trans. Fuzzy Syst. 5 (1) (1997)
Juan A. Prieto, Adoración Rueda, José M. Quintana, José Luis Huertas
A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs. ED&TC (1997)
Salvador Mir, Adoración Rueda, Thomas Olbrich, Eduardo J. Peralías, José Luis Huertas
SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems. DAC (1997)
Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
Statistical behavioral modeling and characterization of A/D converters. ICCAD (1995)
Maria J. Avedillo, José M. Quintana, José Luis Huertas
Constrained state assignment of easily testable FSMs. J. Electron. Test. 6 (1) (1995)
Diego Vázquez, Adoración Rueda, José Luis Huertas
A new strategy for testing analog filters. VTS (1994)
Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, José Luis Huertas
A Real Time Clustering CMOS Neural Engine. NIPS (1994)
Manuel J. Bellido, Manuel Valencia-Barrero, Antonio J. Acosta, Angel Barriga, José Luis Huertas, Rafael Domínguez-Castro
A New Faster Method for Calculating the Resolution Coefficient of CMOS Latches: Design of an Optimum Latch. ISCAS (1993)
José Luis Huertas, Adoración Rueda, Diego Vázquez
Improving the testability of switched-capacitor filters. J. Electron. Test. 4 (4) (1993)
Servando Espejo-Meana, Ángel Rodríguez-Vázquez, Rafael Domínguez-Castro, Bernabé Linares-Barranco, José Luis Huertas
A Model for VLSI Implementation of CNN Image Processing Chips Using Current-mode Techniques. ISCAS (1993)
José Luis Huertas, Diego Vázquez, Adoración Rueda
On-line testing of switched-capacitor filters. VTS (1992)
Bernabé Linares-Barranco, Edgar Sánchez-Sinencio, Ángel Rodríguez-Vázquez, José Luis Huertas
CMOS Continuous BAM With On Chip Learning. IWANN (1991)
Maria J. Avedillo, José M. Quintana, José Luis Huertas
A new method for the state reduction of incompletely specified finite sequential machines. EURO-DAC (1990)
José Luis Huertas, José I. Acha, G. Sanchez Gomez
Theory and design of multivalued memory elements. MVL (1978)
José Luis Huertas, José I. Acha, L. Macias
On the synthesis of multivalued circuits using principally binary elements. MVL (1978)