Adoración Rueda

ORCID

Publication Activity (10 Years)

Years Active: 1987-2019
Publications (10 Years): 13

Top Venues

LASCAS

ICECS

ETS

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Mismatch and Offset Calibration in Redundant SAR ADC. DCIS (2019)
Antonio Jose Ginés, Eduardo José Peralías, Cristina Aledo, Adoración Rueda
Fast adaptive comparator offset calibration in pipeline ADC with self-repairing thermometer to binary encoder. Int. J. Circuit Theory Appl. 47 (3) (2019)
Antonio J. Ginés, Antonio Lopez-Angulo, Eduardo J. Peralías, Adoración Rueda
Description of SAR ADCs with Digital Redundancy using a Unified Hardware-Based Approach. ISCAS (2018)
Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Redundant SAR ADCs with Split-capacitor DAC. ICECS (2018)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Black-Box Calibration for ADCs With Hard Nonlinear Errors Using a Novel INL-Based Additive Code: A Pipeline ADC Case Study. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2017)
Manuel J. Barragan, Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
On the limits of machine learning-based test: A calibrated mixed-signal system case study. DATE (2017)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Fast Background Calibration of Sampling Timing Skew in SHA-Less Pipeline ADCs. IEEE Trans. Very Large Scale Integr. Syst. 25 (10) (2017)
Andrés Maldonado, Gloria Huertas, Adoración Rueda, José Luis Huertas, Pablo Pérez, Alberto Yufera
Cell-culture measurements using voltage oscillations. LASCAS (2016)
Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda, Guillaume Renaud, Manuel J. Barragan, Salvador Mir
Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator. ETS (2016)
Andrés Maldonado, Pablo Pérez, Gloria Huertas, Alberto Yufera, Adoración Rueda, José L. Huertas
From voltage oscillations to tissue-impedance measurements. BioCAS (2015)
Antonio Jose Ginés, Eduardo J. Peralías, Adoración Rueda
Background Digital Calibration of Comparator Offsets in Pipeline ADCs. IEEE Trans. Very Large Scale Integr. Syst. 23 (7) (2015)
Juan Núñez, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs. LASCAS (2015)
Gloria Huertas, Andrés Maldonado, Alberto Yufera, Adoración Rueda, José Luis Huertas
The Bio-Oscillator: A Circuit for Cell-Culture Assays. IEEE Trans. Circuits Syst. II Express Briefs (2) (2015)
Eduardo J. Peralías, Antonio Jose Ginés, Adoración Rueda
INL systematic reduced-test technique for Pipeline ADCs. ETS (2014)
Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda
Closed-loop simulation method for evaluation of static offset in discrete-time comparators. ICECS (2014)
Ricardo Doldán, Antonio J. Ginés, Adoración Rueda
Inductor characterization in RF LC-VCOs. LASCAS (2013)
Manuel J. Barragan, Gildas Léger, Diego Vázquez, Adoración Rueda
Sinusoidal signal generation for mixed-signal BIST using a harmonic-cancellation technique. LASCAS (2013)
Jorge Luis González Rios, J. Cruz, Diego Vázquez, Adoración Rueda
Analysis of process variations' impact on a 2.4 GHz 90 nm CMOS LNA. LASCAS (2013)
Ricardo Doldán, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Analysis of steady-state common-mode response in differential LC-VCOs. ISCAS (2012)
Antonio Jose Ginés, Alberto Villegas, Eduardo J. Peralías, Adoración Rueda
Self-biased input common-mode generation for improving dynamic range and yield in inverter-based filters. ICECS (2012)
Manuel J. Barragan Asian, Rafaella Fiorelli, Gildas Léger, Adoración Rueda, José L. Huertas
Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs. Asian Test Symposium (2011)
Manuel J. Barragan Asian, Rafaella Fiorelli, Gildas Léger, Adoración Rueda, José L. Huertas
Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures. J. Electron. Test. 27 (3) (2011)
Rafaella Fiorelli, Alberto Villegas, Eduardo J. Peralías, Diego Vázquez, Adoración Rueda
2.4-GHz single-ended input low-power low-voltage active front-end for ZigBee applications in 90 nm CMOS. ECCTD (2011)
Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
Analog Sinewave Signal Generators for Mixed-Signal Built-in Test Applications. J. Electron. Test. 27 (3) (2011)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus. IEEE Trans. Instrum. Meas. 60 (2) (2011)
Alberto Villegas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda
-order CMOS complex filter for IEEE 802.15.4 standard. ESSCIRC (2011)
Alberto Yufera, Adoración Rueda
Design of a CMOS closed-loop system with applications to bio-impedance measurements. Microelectron. J. 41 (4) (2010)
Alberto Villegas, Diego Vázquez, Adoración Rueda
A low power low voltage mixer for 2.4GHz applications in CMOS-90nm technology. DDECS (2010)
Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
A BIST Solution for Frequency Domain Characterization of Analog Circuits. J. Electron. Test. 26 (4) (2010)
Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
On Chopper Effects in Discrete-Time SigmaDelta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2010)
Manuel J. Barragan Asian, Gloria Huertas, Adoración Rueda, José Luis Huertas
(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems. DELTA (2010)
Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vázquez, Adoración Rueda, José Luis Huertas
Low-cost signature test of RF blocks based on envelope response analysis. ETS (2010)
Antonio J. Ginés, Ricardo Doldán, Adoración Rueda, Eduardo J. Peralías
Power optimization of CMOS programmable gain amplifiers with high dynamic range and common-mode feed-forward circuit. ICECS (2010)
Antonio J. Ginés, Ricardo Doldán, Manuel J. Barragan Asian, Adoración Rueda, Eduardo J. Peralías
On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation. ISCAS (2010)
Alberto Yufera, Adoración Rueda
Design of A CMOS closed-loop system useful for bio-impedance measurements. ICECS (2009)
Alberto Yufera, Adoración Rueda
A CMOS bio-impedance measurement system. DDECS (2009)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
A survey on digital background calibration of ADCs. ECCTD (2009)
Gildas Léger, Adoración Rueda
Low-Cost Digital Detection of Parametric Faults in Cascaded SigmaDelta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2009)
Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vázquez, Adoración Rueda, José Luis Huertas
A BIST Solution for the Functional Characterization of RF Systems Based on Envelope Response Analysis. Asian Test Symposium (2009)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
On-line estimation of the integral non-linear errors in analogue-to-digital converters without histogram evaluation. ECCTD (2009)
Ricardo Doldán Lorenzo, Antonio Jose Ginés Arteaga, Adoración Rueda, Eduardo J. Peralías
A 5GHz wide tuning range LC-VCO in sub-micrometer CMOS technology. APCCAS (2008)
Rafaella Fiorelli, Fernando Silveira, Eduardo J. Peralías, Diego Vázquez, Adoración Rueda, José Luis Huertas
A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model. SBCCI (2008)
Antonio Jose Ginés, Ricardo Doldán, Alberto Villegas, Antonio J. Acosta, Maria Angeles Jalón, Diego Vázquez, Adoración Rueda, Eduardo J. Peralías
A 1.2V 5.14mW quadrature frequency synthesizer in 90nm CMOS technology for 2.4GHz ZigBee applications. APCCAS (2008)
Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
Practical Implementation of a Network Analyzer for Analog BIST Applications. DATE (2008)
Eduardo J. Peralías, Maria Angeles Jalón, Adoración Rueda
Simple Evaluation of the Nonlinearity Signature of an ADC Using a Spectral Approach. VLSI Design 2008 (2008)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS. SBCCI (2007)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Improved Background Algorithms for Pipeline ADC Full Calibration. ISCAS (2007)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs. ISCAS (2006)
Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
A Sinewave Analyzer for Mixed-Signal BIST Applications in a 0.35µm Technology. DDECS (2006)
Gildas Léger, Adoración Rueda
Experimental Validation of a Fully Digital BISTfor Cascaded Sigma Delta Modulators. ETS (2006)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Full calibration digital techniques for pipeline ADCs. ISCAS (3) (2005)
Alberto Yufera, Adoración Rueda, José Maria Muñoz, Ricardo Doldán, Gildas Léger, Esther Rodríguez-Villegas
A tissue impedance measurement chip for myocardial ischemia detection. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2005)
Diego Vázquez, Gloria Huertas, África Luque, Manuel J. Barragan Asian, Gildas Léger, Adoración Rueda, José Luis Huertas
Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST. J. Electron. Test. 21 (3) (2005)
Adoración Rueda, Michel Renovell, José Luis Huertas
Guest Editorial. J. Electron. Test. 21 (3) (2005)
Esther Rodríguez-Villegas, Alberto Yúfera, Adoración Rueda
A 1-V micropower log-domain integrator based on FGMOS transistors operating in weak inversion. IEEE J. Solid State Circuits 39 (1) (2004)
Diego Vázquez, Gildas Léger, Gloria Huertas, Adoración Rueda, José L. Huertas
A Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications. DATE (2004)
Esther Rodríguez-Villegas, Alberto Yúfera, Adoración Rueda
A 1.25-V micropower Gm-C filter based on FGMOS transistors operating in weak inversion. IEEE J. Solid State Circuits 39 (1) (2004)
Gildas Léger, Adoración Rueda
A Digital Test for First-Order [Sigma-Delta] Modulators. DATE (2004)
Gildas Léger, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2004)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Digital Background Gain Error Correction in Pipeline ADCs. DATE (2004)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Digital Background Calibration Technique for Pipeline ADCs with Multi-Bit Stages. SBCCI (2003)
Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
Oscillation-based test in bandpass oversampled A/D converters. Microelectron. J. 34 (10) (2003)
Esther Rodríguez-Villegas, Alberto Yufera, Adoración Rueda
A Charge Correction Cell for FGMOS-Based Circuits. SBCCI (2003)
Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
Practical Oscillation-Based Test of Integrated Filters. IEEE Des. Test Comput. 19 (6) (2002)
Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell. IEEE Des. Test Comput. 19 (6) (2002)
Diego Vázquez, Gloria Huertas, Adoración Rueda, Gildas Léger, José L. Huertas
Low-cost on-chip measurements for Oscillation-Based-Test in Analog Integrated Circuits. LATW (2002)
Diego Vázquez, Gloria Huertas, Gildas Léger, Adoración Rueda, José L. Huertas
Practical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation. VTS (2002)
Ricardo Doldán, Alberto Yúfera, Adoración Rueda
A Continuous-Time Incremental Analog to Digital Converter. SBCCI (2002)
Luis Quintanilla, Jesús Arias Álvarez, Lourdes Enríquez, José Vicente, Juan Barbolla, Diego Vázquez, Adoración Rueda
Design of a switched opamp-based bandpass filter in a 0.35 μm CMOS technology. ICECS (2002)
Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
Practical Oscillation-Based Test in Analog Integrated Filters: Experimental Results. DELTA (2002)
Esther Rodríguez-Villegas, José M. Quintana, Maria J. Avedillo, Adoración Rueda
High-speed low-power logic gates using floating gates. ISCAS (5) (2002)
Diego Vázquez, Gloria Huertas, Gildas Léger, Adoración Rueda, José L. Huertas
Practical solutions for the application of the oscillation-based-test in analog integrated circuits. ISCAS (1) (2002)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda, Ralf Seepold, Natividad Martínez Madrid
A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects. DATE (2002)
José M. Quintana, Maria J. Avedillo, Esther Rodríguez-Villegas, Adoración Rueda
Threshold-logic-based design of compressors. ICECS (2002)
Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yufera
A micropower log domain FGMOS filter. ISCAS (3) (2002)
Natividad Martínez Madrid, Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda
Analog/mixed-signal IP modeling for design reuse. DATE (2001)
Eduardo J. Peralías, Gloria Huertas, Adoración Rueda, José L. Huertas
Self-Testable Pipelined ADC with Low Hardware Overhead. VTS (2001)
Jesús Arias Álvarez, Luis Quintanilla, Lourdes Enríquez, José Vicente, Juan Barbolla, Diego Vázquez, Adoración Rueda
Design of a CMOS fully differential switched-opamp for SC circuits at very low power supply voltages. ICECS (2001)
Esther Rodríguez-Villegas, Alberto Yufera, Adoración Rueda
A Low-Voltage Floating-Gate MOS Biquad. VLSI Design 2001 (3) (2001)
Eduardo J. Peralías, Adoración Rueda, José L. Huertas
Structural testing of pipelined analog to digital converters. ISCAS (1) (2001)
Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yufera
A 1.25 V FGMOS filter using translinear circuits. ISCAS (1) (2001)
Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yúfera
A 1.5 V 23 MHz low power FGMOS filter. ICECS (2001)
Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters. J. Electron. Test. 17 (5) (2001)
Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda, José L. Huertas
A Vhdl-Based Methodology for Design and Verification of Pipeline A/D Converters. DATE (2000)
Eduardo J. Peralías, Adoración Rueda, José L. Huertas
Alternative DFT Strategies for High-Speed Pipelined Data Converters. LATW (2000)
Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
Built-In Self-Test in Mixed-Signal ICs: A DTMF Macrocell. VLSI Design (2000)
Esther O. Rodríguez, Alberto Yufera, Adoración Rueda
-C floating-gate MOS integrator. ISCAS (2000)
Esther Rodríguez-Villegas, Maria J. Avedillo, José M. Quintana, Gloria Huertas, Adoración Rueda
νMOS-based Sorter for Arithmetic Applications. VLSI Design 2000 (2) (2000)
Raúl Jiménez, Antonio J. Acosta, Eduardo J. Peralías, Adoración Rueda
An Application of Self-Timed Circuits to the Reduction of Switching Noise in Analog-Digital Circuits. PATMOS (2000)
Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José L. Huertas
Testing mixed-signal cores: practical oscillation-based test in an analog macrocell. Asian Test Symposium (2000)
Esther O. Rodríguez, Alberto Yufera, Adoración Rueda
A low-voltage √x floating-gate MOS integrator. ISCAS (2000)
José M. Quintana, Maria J. Avedillo, Esther Rodríguez-Villegas, Adoración Rueda
Efficient νMOS Realization of Threshold Voters for Self-Purging Redundancy. SBCCI (2000)
Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda, José L. Huertas
VHDL-based behavioural description of pipeline ADCs. ISCAS (2000)
Alberto Yufera, Adoración Rueda
Programmable low-voltage continuous-time filter for audio applications. ISCAS (2) (1999)
Esther Rodríguez-Villegas, Maria J. Avedillo, José M. Quintana, Gloria Huertas, Adoración Rueda
vMOS-based sorters for multiplier implementations. ISCAS (1) (1999)
Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
Effective oscillation-based test for application to a DTMF filter bank. ITC (1999)
Juan A. Prieto, Adoración Rueda, Ian Andrew Grout, Eduardo J. Peralías, José L. Huertas, Andrew Mark David Richardson
An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits. DATE (1998)
Eduardo J. Peralías, Adoración Rueda, Juan A. Prieto, José L. Huertas
DfT and on-line test of high-performance data converters: a practical case. ITC (1998)
Eduardo J. Peralías, Adoración Rueda, José L. Huertas
CMOS pipelined A/D converters with concurrent error detection capability. ICECS (1998)
Diego Vázquez, Adoración Rueda, José Luis Huertas, Eduardo J. Peralías
A high-Q bandpass fully differential SC filter with enhanced testability. IEEE J. Solid State Circuits 33 (7) (1998)

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Publication Activity (10 Years)

Top Topics

Top Venues

Adoración Rueda