Antonio J. Ginés

Publication Activity (10 Years)

Years Active: 2002-2023
Publications (10 Years): 18

Top Topics

Top Venues

Publications

Carlos Manuel Domínguez-Matas, Antonio J. Ginés, Aránzazu Otín, Valentin Gutierrez, Gildas Léger, Eduardo J. Peralías
Behavioral Model for High-Speed SAR ADCs With On-Chip References. IEEE Trans. Very Large Scale Integr. Syst. 31 (12) (2023)
Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Valentin Gutierrez, C. Dominguez, Maria Angeles Jalón, L. Carranza
A Single-Event Latchup setup for high-precision AMS circuits. ETS (2023)
Gildas Léger, Antonio J. Ginés, Valentin Gutierrez, Manuel J. Barragan
A methodology for defect detection in analog circuits based on causal feature selection. ICECS 2022 (2022)
Antonio J. Ginés, Gildas Léger, Eduardo J. Peralías
Digital Non-Linearity Calibration for ADCs With Redundancy Using a New LUT Approach. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (8) (2021)
Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías
Digital calibration of capacitor mismatch and comparison offset in Split-CDAC SAR ADCs with redundancy. NEWCAS (2020)
J. A. Serrano, Antonio J. Ginés, Eduardo J. Peralías
Fast Simulation of Non-Linear Circuits using Semi-Analytical Solutions Based on the Matrix Exponential. ISCAS (2020)
Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías
Calibration of Capacitor Mismatch and Static Comparator Offset in SAR ADC with Digital Redundancy. ISCAS (2020)
Antonio J. Ginés, Gildas Léger, Eduardo J. Peralías
Non-Linear Calibration of Pipeline ADCs using a Histogram-Based Estimation of the Redundant INL. NEWCAS (2020)
Renato S. Feitoza, Manuel J. Barragan, Antonio J. Ginés, Salvador Mir
-based switching SAR ADCs using a reduced-code measurement technique. NEWCAS (2020)
Renato S. Feitoza, Manuel J. Barragan, Antonio J. Ginés, Salvador Mir
-based switching SAR ADCs using an incremental analog-to-digital converter. ETS (2020)
Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Mismatch and Offset Calibration in Redundant SAR ADC. DCIS (2019)
Antonio J. Ginés, Antonio Lopez-Angulo, Eduardo J. Peralías, Adoración Rueda
Description of SAR ADCs with Digital Redundancy using a Unified Hardware-Based Approach. ISCAS (2018)
Valentin Guiterrez, Antonio J. Ginés, Gildas Léger
AMS-RF test quality: Assessing defect severity. IOLTS (2018)
Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Redundant SAR ADCs with Split-capacitor DAC. ICECS (2018)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Black-Box Calibration for ADCs With Hard Nonlinear Errors Using a Novel INL-Based Additive Code: A Pipeline ADC Case Study. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2017)
Manuel J. Barragan, Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
On the limits of machine learning-based test: A calibrated mixed-signal system case study. DATE (2017)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Fast Background Calibration of Sampling Timing Skew in SHA-Less Pipeline ADCs. IEEE Trans. Very Large Scale Integr. Syst. 25 (10) (2017)
Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda, Guillaume Renaud, Manuel J. Barragan, Salvador Mir
Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator. ETS (2016)
Juan Núñez, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs. LASCAS (2015)
Antonio J. Ginés, Gildas Léger
Sigma-delta testability for pipeline A/D converters. DATE (2014)
Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda
Closed-loop simulation method for evaluation of static offset in discrete-time comparators. ICECS (2014)
Ricardo Doldán, Antonio J. Ginés, Adoración Rueda
Inductor characterization in RF LC-VCOs. LASCAS (2013)
Ricardo Doldán, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Analysis of steady-state common-mode response in differential LC-VCOs. ISCAS (2012)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus. IEEE Trans. Instrum. Meas. 60 (2) (2011)
Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
On Chopper Effects in Discrete-Time SigmaDelta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2010)
Antonio J. Ginés, Ricardo Doldán, Adoración Rueda, Eduardo J. Peralías
Power optimization of CMOS programmable gain amplifiers with high dynamic range and common-mode feed-forward circuit. ICECS (2010)
Antonio J. Ginés, Ricardo Doldán, Manuel J. Barragan Asian, Adoración Rueda, Eduardo J. Peralías
On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation. ISCAS (2010)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
A survey on digital background calibration of ADCs. ECCTD (2009)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
On-line estimation of the integral non-linear errors in analogue-to-digital converters without histogram evaluation. ECCTD (2009)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS. SBCCI (2007)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Improved Background Algorithms for Pipeline ADC Full Calibration. ISCAS (2007)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs. ISCAS (2006)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Full calibration digital techniques for pipeline ADCs. ISCAS (3) (2005)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Digital Background Gain Error Correction in Pipeline ADCs. DATE (2004)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
Digital Background Calibration Technique for Pipeline ADCs with Multi-Bit Stages. SBCCI (2003)
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda, Ralf Seepold, Natividad Martínez Madrid
A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects. DATE (2002)