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A Low-Voltage Floating-Gate MOS Biquad.

Esther Rodríguez-VillegasAlberto YuferaAdoración Rueda
Published in: VLSI Design (2001)
Keyphrases
  • floating gate
  • low voltage
  • design considerations
  • power line
  • power management
  • cmos technology
  • real time
  • genetic algorithm
  • low cost
  • power consumption