High-speed low-power logic gates using floating gates.

Esther Rodríguez-Villegas José M. Quintana Maria J. Avedillo Adoración Rueda

Published in: ISCAS (5) (2002)

Keyphrases

low power
logic circuits
high speed
low cost
power consumption
high power
single chip
digital signal processing
gate array
wireless transmission
vlsi architecture
vlsi circuits
cmos technology
power dissipation
low power consumption
frame rate
image sensor
delay insensitive
energy dissipation
mixed signal