Hamid Mahmoodi

Publication Activity (10 Years)

Years Active: 2004-2022
Publications (10 Years): 17

Top Topics

Reverse Engineer

Social Intelligence

Functional Units

Top Venues

Microelectron. Reliab.

ACM Great Lakes Symposium on VLSI

ACM Trans. Design Autom. Electr. Syst.

Publications

Gaurav Kolhe, Tyler David Sheaves, Sai Manoj P. D., Hamid Mahmoodi, Setareh Rafatirad, Avesta Sasan, Houman Homayoun
Breaking the Design and Security Trade-off of Look-up-table-based Obfuscation. ACM Trans. Design Autom. Electr. Syst. 27 (6) (2022)
Gaurav Kolhe, Tyler Sheaves, Kevin Immanuel Gubbi, Tejas Kadale, Setareh Rafatirad, Sai Manoj PD, Avesta Sasan, Hamid Mahmoodi, Houman Homayoun
Silicon validation of LUT-based logic-locked IP cores. DAC (2022)
Fatemeh Tehranipoor, Nima Karimian, Mehran Mozaffari Kermani, Hamid Mahmoodi
Deep RNN-Oriented Paradigm Shift through BOCANet: Broken Obfuscated Circuit Attack. ACM Great Lakes Symposium on VLSI (2019)
Gaurav Kolhe, Hadi Mardani Kamali, Miklesh Naicker, Tyler David Sheaves, Hamid Mahmoodi, Sai Manoj P. D., Houman Homayoun, Setareh Rafatirad, Avesta Sasan
Security and Complexity Analysis of LUT-based Obfuscation: From Blueprint to Reality. ICCAD (2019)
Gaurav Kolhe, Sai Manoj P. D., Setareh Rafatirad, Hamid Mahmoodi, Avesta Sasan, Houman Homayoun
On Custom LUT-based Obfuscation. ACM Great Lakes Symposium on VLSI (2019)
Ragh Kuttappa, Adarsha Balaji, Vasil Pano, Baris Taskin, Hamid Mahmoodi
RotaSYN: Rotary Traveling Wave Oscillator SYNthesizer. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2019)
Fatemeh Tehranipoor, Nima Karimian, Mehran Mozaffari Kermani, Hamid Mahmoodi
Deep RNN-Oriented Paradigm Shift through BOCANet: Broken Obfuscated Circuit Attack. CoRR (2018)
Ted Winograd, Gaurav Shenoy, Hassan Salmani, Hamid Mahmoodi, Setareh Rafatirad, Houman Homayoun
Programmable Gates Using Hybrid CMOS-STT Design to Prevent IC Reverse Engineering. ACM Trans. Design Autom. Electr. Syst. 23 (6) (2018)
Aliyar Attaran, Tyler David Sheaves, Praveen Kumar Mugula, Hamid Mahmoodi
Static Design of Spin Transfer Torques Magnetic Look Up Tables for ASIC Designs. ACM Great Lakes Symposium on VLSI (2018)
Theodore Winograd, Hassan Salmani, Hamid Mahmoodi, Kris Gaj, Houman Homayoun
Hybrid STT-CMOS designs for reverse-engineering prevention. DAC (2016)
Aliyar Attaran, Hassan Salmani, Houman Homayoun, Hamid Mahmoodi
Dynamic single and Dual Rail spin transfer torque look up tables with enhanced robustness under CMOS and MTJ process variations. ICCD (2016)
Theodore Winograd, Hassan Salmani, Hamid Mahmoodi, Houman Homayoun
Preventing design reverse engineering with reconfigurable spin transfer torque LUT gates. ISQED (2016)
Kolsoom Mehrabi, Behzad Ebrahimi, Roohollah Yarmand, Ali Afzali-Kusha, Hamid Mahmoodi
Read static noise margin aging model considering SBD and BTI effects for FinFET SRAMs. Microelectron. Reliab. 65 (2016)
Darya Almasi, Houman Homayoun, Hassan Salmani, Hamid Mahmoodi
Comparative analysis of hybrid Magnetic Tunnel Junction and CMOS logic circuits. SoCC (2016)
Ragh Kuttappa, Houman Homayoun, Hassan Salmani, Hamid Mahmoodi
Comparative analysis of robustness of spin transfer torque based look up tables under process variations. ISCAS (2016)
Ragh Kuttappa, Houman Homayoun, Hassan Salmani, Hamid Mahmoodi
Reliability analysis of spin transfer torque based look up tables under process variations and NBTI aging. Microelectron. Reliab. 62 (2016)
Seyed Saber Nabavi Larimi, Mehdi Kamal, Ali Afzali-Kusha, Hamid Mahmoodi
Power and energy reduction of racetrack-based caches by exploiting shared shift operations. VLSI-SoC (2016)
Adarsh Reddy Ashammagari, Hamid Mahmoodi, Tinoosh Mohsenin, Houman Homayoun
Reconfigurable STT-NV LUT-based functional units to improve performance in general-purpose processors. ACM Great Lakes Symposium on VLSI (2014)
Adarsh Reddy Ashammagari, Hamid Mahmoodi, Houman Homayoun
Exploiting STT-NV technology for reconfigurable, high performance, low power, and low temperature functional unit design. DATE (2014)
Farshad Moradi, Georgios Panagopoulos, Georgios Karakonstantis, Hooman Farkhani, Dag T. Wisland, Jens Kargaard Madsen, Hamid Mahmoodi, Kaushik Roy
Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology. Microelectron. J. 45 (1) (2014)
Behzad Ebrahimi, Ali Afzali-Kusha, Hamid Mahmoodi
Robust FinFET SRAM design based on dynamic back-gate voltage adjustment. Microelectron. Reliab. 54 (11) (2014)
Hamid Mahmoodi, Sridevi Srinivasan Lakshmipuram, Manish Arora, Yashar Asgarieh, Houman Homayoun, Bill Lin, Dean M. Tullsen
Resistive Computation: A Critique. IEEE Comput. Archit. Lett. 13 (2) (2014)
Behrouz Afzal, Behzad Ebrahimi, Ali Afzali-Kusha, Hamid Mahmoodi
An analytical model for read static noise margin including soft oxide breakdown, negative and positive bias temperature instabilities. Microelectron. Reliab. 53 (5) (2013)
Farshad Moradi, Tuan Vu Cao, Elena I. Vatajelu, Ali Peiravi, Hamid Mahmoodi, Dag T. Wisland
Domino logic designs for high-performance and leakage-tolerant applications. Integr. 46 (3) (2013)
Farshad Moradi, Dag T. Wisland, Jens Kargaard Madsen, Hamid Mahmoodi
Flip-flop design using novel pulse generation technique. ICECS (2012)
Hamid Mahmoodi
Reliability enhancement of power gating transistor under time dependent dielectric breakdown. VLSI-SoC (2012)
Masaoud Houshmand Kaffashian, Reza Lotfi, Khalil Mafinezhad, Hamid Mahmoodi
Impacts of NBTI/PBTI on performance of domino logic circuits with high-k metal-gate devices in nanoscale CMOS. Microelectron. Reliab. 52 (8) (2012)
Roberto Menchaca, Hamid Mahmoodi
Impact of transistor aging effects on sense amplifier reliability in nano-scale CMOS. ISQED (2012)
Behrouz Afzal, Behzad Ebrahimi, Ali Afzali-Kusha, Hamid Mahmoodi
Modeling read SNM considering both soft oxide breakdown and negative bias temperature instability. Microelectron. Reliab. 52 (12) (2012)
Abhishek Guar, Hamid Mahmoodi
Impact of technology scaling on performance of domino logic in nano-scale CMOS. VLSI-SoC (2012)
Shreyas Kumar Krishnappa, Hamid Mahmoodi
Comparative BTI reliability analysis of SRAM cell designs in nano-scale CMOS technology. ISQED (2011)
Vish Ganti, Hamid Mahmoodi
Comparative analysis of copper and CNT interconnects for H-tree clock distribution. ICCD (2011)
Vikram G. Rao, Hamid Mahmoodi
Analysis of reliability of flip-flops under transistor aging effects in nano-scale CMOS technology. ICCD (2011)
Masaoud Houshmand Kaffashian, Reza Lotfi, Khalil Mafinezhad, Hamid Mahmoodi
An optimization method for NBTI-aware design of domino logic circuits in nano-scale CMOS. IEICE Electron. Express 8 (17) (2011)
Farshad Moradi, Georgios Panagopoulos, Georgios Karakonstantis, Dag T. Wisland, Hamid Mahmoodi, Jens Kargaard Madsen, Kaushik Roy
Multi-level wordline driver for low power SRAMs in nano-scale CMOS technology. ICCD (2011)
Masaoud Houshmand Kaffashian, Reza Lotfi, Khalil Mafinezhad, Hamid Mahmoodi
Impact of NBTI on performance of domino logic circuits in nano-scale CMOS. Microelectron. J. 42 (12) (2011)
Anuj Pushkarna, Sajna Raghavan, Hamid Mahmoodi
Comparison of performance parameters of SRAM designs in 16nm CMOS and CNTFET technologies. SoCC (2010)
Somnath Paul, Hamid Mahmoodi, Swarup Bhunia
calibration at multiple operating points using delay-sensitivity-based path selection. ACM Trans. Design Autom. Electr. Syst. 15 (2) (2010)
Anuj Pushkarna, Hamid Mahmoodi
Reliability analysis of power gated SRAM under combined effects of NBTI and PBTI in nano-scale CMOS. ACM Great Lakes Symposium on VLSI (2010)
Farshad Moradi, Charles Augustine, Ashish Goel, Georgios Karakonstantis, Tuan Vu Cao, Dag T. Wisland, Hamid Mahmoodi, Kaushik Roy
Data-dependant sense-amplifier flip-flop for low power applications. CICC (2010)
Minki Cho, Jason Schlessman, Hamid Mahmoodi, Marilyn Wolf, Saibal Mukhopadhyay
Postsilicon Adaptation for Low-Power SRAM under Process Variation. IEEE Des. Test Comput. 27 (6) (2010)
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunsoo Choo, Jongsun Park, Woopyo Jeong, Kaushik Roy
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive Filtering. J. Signal Process. Syst. 58 (2) (2010)
Ankitchandra Shah, Hamid Mahmoodi
Thermal estimation for accurate estimation of impact of BTI aging effects on nano-scale SRAM circuits. SoCC (2010)
Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Yngvar Berg, Tuan Vu Cao
New SRAM design using body bias technique for ultra low power applications. ISQED (2010)
Eli Lyons, Vish Ganti, Richard Goldman, Vazgen Melikyan, Hamid Mahmoodi
Full-custom design project for digital VLSI and IC design courses using synopsys generic 90nm CMOS library. MSE (2009)
Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Tuan Vu Cao
Improved write margin 6T-SRAM for low supply voltage applications. SoCC (2009)
Hamid Mahmoodi, Vishy Tirumalashetty, Matthew Cooke, Kaushik Roy
Ultra Low-Power Clocking Scheme Using Energy Recovery and Clock Gating. IEEE Trans. Very Large Scale Integr. Syst. 17 (1) (2009)
Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Snorre Aunet, Tuan Vu Cao, Ali Peiravi
Ultra Low Power Full Adder Topologies. ISCAS (2009)
Hamid Mahmoodi, Ali A. Jalali
Virtual Age: Enabling Technologies and Trends. ITNG (2009)
Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Ali Peiravi, Snorre Aunet, Tuan Vu Cao
New subthreshold concepts in 65nm CMOS technology. ISQED (2009)
Hamid Mahmoodi, Jeanne Trinko Mechler
Session 8 - Characterization and test methods for device variability in nanoscale technologies. CICC (2008)
Saibal Mukhopadhyay, Hamid Mahmoodi, Kaushik Roy
Reduction of Parametric Failures in Sub-100-nm SRAM Array Using Body Bias. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (1) (2008)
Keejong Kim, Hamid Mahmoodi, Kaushik Roy
A Low-Power SRAM Using Bit-Line Charge-Recycling. IEEE J. Solid State Circuits 43 (2) (2008)
Swarup Bhunia, Hamid Mahmoodi, Arijit Raychowdhury, Kaushik Roy
Arbitrary Two-Pattern Delay Testing Using a Low-Overhead Supply Gating Technique. J. Electron. Test. 24 (6) (2008)
Farshad Moradi, Dag T. Wisland, Snorre Aunet, Hamid Mahmoodi, Tuan Vu Cao
65NM sub-threshold 11T-SRAM for ultra low voltage applications. SoCC (2008)
Vishwanadh Tirumalashetty, Hamid Mahmoodi
Clock Gating and Negative Edge Triggering for Energy Recovery Clock. ISCAS (2007)
Keejong Kim, Hamid Mahmoodi, Kaushik Roy
A low-power SRAM using bit-line charge-recycling technique. ISLPED (2007)
Animesh Datta, Ashish Goel, R. T. Cakici, Hamid Mahmoodi, Dheepa Lekshmanan, Kaushik Roy
Modeling and Circuit Synthesis for Independently Controlled Double Gate FinFET Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (11) (2007)
Somnath Paul, Sivasubramaniam Krishnamurthy, Hamid Mahmoodi, Swarup Bhunia
Low-overhead design technique for calibration of maximum frequency at multiple operating points. ICCAD (2007)
Saibal Mukhopadhyay, Keejong Kim, Hamid Mahmoodi, Kaushik Roy
Design of a Process Variation Tolerant Self-Repairing SRAM for Yield Enhancement in Nanoscaled CMOS. IEEE J. Solid State Circuits 42 (6) (2007)
Rajani Kuchipudi, Hamid Mahmoodi
Strain Silicon Optimization for Memory and Logic in Nano-Scale CMOS. ISQED (2007)
Joyce Yeung, Hamid Mahmoodi
Robust Sense Amplifier Design under Random Dopant Fluctuations in Nano-Scale CMOS Technologies. SoCC (2006)
Nilanjan Banerjee, Arijit Raychowdhury, Kaushik Roy, Swarup Bhunia, Hamid Mahmoodi
Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 14 (9) (2006)
Qikai Chen, Saibal Mukhopadhyay, Hamid Mahmoodi, Kaushik Roy
Process Variation Tolerant Online Current Monitor for Robust Systems. IOLTS (2005)
Mesut Meterelliyoz, Hamid Mahmoodi, Kaushik Roy
A leakage control system for thermal stability during burn-in test. ITC (2005)
Hamid Mahmoodi, Saibal Mukhopadhyay, Kaushik Roy
Estimation of delay variations due to random-dopant fluctuations in nanoscale CMOS circuits. IEEE J. Solid State Circuits 40 (9) (2005)
Saibal Mukhopadhyay, Kunhyuk Kang, Hamid Mahmoodi, Kaushik Roy
Reliable and self-repairing SRAM in nano-scale technologies using leakage and delay monitoring. ITC (2005)
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunsoo Choo, Jongsun Park, Woopyo Jeong, Kaushik Roy
Hardware architecture and VLSI implementation of a low-power high-performance polyphase channelizer with applications to subband adaptive filtering. ICASSP (5) (2004)