Yngvar Berg

ORCID

Publication Activity (10 Years)

Years Active: 1995-2024
Publications (10 Years): 31

Top Venues

Publications

Omid Mirmotahari, Anders I. Mørch, Yngvar Berg
Evolution of Technological Innovations, User Experiences, and Literacies. CoPDA@AVI (2024)
Omid Mirmotahari, Gunnar Rye Bergersen, Yngvar Berg, Kristin Bråthen, Kristin Broch Eliassen
Framework for Pupil-to-Student Transition, Learning Environment and Semester Start for First-Year Students. I3E Workshops (2019)
Omid Mirmotahari, Yngvar Berg, Stein Gjessing, Ester Fremstad, Crina Damsa
A Case-Study of Automated Feedback Assessment. EDUCON (2019)
Ali Dadashi, Yngvar Berg, Omid Mirmotahari
A 4.5 fJ/conversion-step 10-bit 0.6V Asynchronous SAR ADC for Battery-free Miniature Sensor Nodes in 65nm CMOS. MIXDES (2019)
Mehdi Azadmehr, Igor Paprotny, Yngvar Berg
Q-Loading of Colpitts-Based Mass-Sensing Oscillators in Resonator-based MEMS Airborne Particulate Matter (PM) Sensors. ICCE (2019)
Omid Mirmotahari, Yngvar Berg, Ester Fremstad, Crina Damsa
Student Engagement by Employing Student Peer Reviews with Criteria-Based Assessment. EDUCON (2019)
Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
A Self-Actuated Front-End for Resonating Sensors. TENCON (2018)
Omid Mirmotahari, Crina Damsa, Yngvar Berg
Formative feedback for learning. Case studies of automated feedback in undergraduate computer science education. ICLS (2018)
Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
A bidirectional front-end for ultrasonic pulse-echo measurements. ICNSC (2018)
Mehdi Azadmehr, Aaron Schreyer-Miller, Igor Paprotny, Yngvar Berg
A New Differential Oscillator with T-type Feedback. UEMCON (2018)
Omid Mirmotahari, Yngvar Berg, Dag Langmyhr, Ester Fremstad, Crina Damsa
Studentaktivisering gjennom bruk av hverandrevurdering for førstesemesters studenter i Canvas LMS: en forsøksstudie. NIK (2018)
Francesco Dell'Anna, Tao Dong, Ping Li, Yumei Wen, Mehdi Azadmehr, Mario R. Casu, Yngvar Berg
Lower-Order Compensation Chain Threshold-Reduction Technique for Multi-Stage Voltage Multipliers. Sensors 18 (4) (2018)
Omid Mirmotahari, Yngvar Berg
Structured peer review using a custom assessment program for electrical engineering students. EDUCON (2018)
Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
A Discrete Implementation of a Semi-Floating Gate Amplifier for Resonating Sensor Front-End. MIXDES (2018)
Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
A Low Power, High Gain Semi-Floating Gate Amplifier for Resonating Sensors Front-End. ISVLSI (2018)
Mehdi Azadmehr, Luca Marchetti, Moataz S. El-Kharashi, Yngvar Berg
A virtual Wheatstone bridge front-end for resistive sensors. ICNSC (2017)
Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
An autozeroing inverter based front-end for resonating sensors. DTIS (2017)
Omid Mirmotahari, Yngvar Berg
High-Speed Digital Domino Logic for Ultra-Low Supply Voltages. Circuits Syst. Signal Process. 36 (12) (2017)
Omid Mirmotahari, Yngvar Berg
Erfaringer fra strukturert peer review ved bruk av et egetutviklet sensureringsprogram. NIK (2017)
Mehdi Azadmehr, Luca Marchetti, Yngvar Berg
A low power analog voltage similarity circuit. ISCAS (2017)
Luca Marchetti, Yngvar Berg, Omid Mirmotahari, Mehdi Azadmehr
A control system for a low power bidirectional front-end for resonating sensors. ICNSC (2017)
Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
A bidirectional front-end with bandwidth control for actuation and read-out of MEMS resonating sensors. MIXDES (2017)
Omid Mirmotahari, Ali Dadashi, Mehdi Azadmehr, Yngvar Berg
High-speed dynamic dual-rail ultra low voltage static CMOS logic operating at 300 mV. DTIS (2016)
Luca Marchetti, Yngvar Berg, Omid Mirmotahari, Mehdi Azadmehr
Bidirectional front-end for piezoelectric resonator. ICNSC (2016)
Luca Marchetti, Amar Romi, Yngvar Berg, Omid Mirmotahari, Mehdi Azadmehr
A discrete implementation of a bidirectional circuit for actuation and read-out of resonating sensors. DTIS (2016)
Omid Mirmotahari, Ali Dadashi, Mehdi Azadmehr, Yngvar Berg
Novel high-speed dynamic differential ultra low voltage logic for supply-voltage below 300 mV. ICECS (2015)
Yngvar Berg, Omid Mirmotahari
Low-voltage and high-speed CMOS circuit design with low-power mode. ICECS (2015)
Ali Dadashi, Yngvar Berg, Omid Mirmotahari
High-Speed, Modified, Bulk stimulated, Ultra-Low-Voltage, Domino Inverter. ISVLSI (2015)
Mehdi Azadmehr, Belal K. Khajeh, Yngvar Berg
A new self-sensing approach for actuation and readout of piezoelectric resonating sensor. ICNSC (2015)
Yngvar Berg, Omid Mirmotahari
Flexible Ultra-Low-Voltage CMOS Circuit Design Applicable for Digital and Analog Circuits Operating below 300mV. ISVLSI (2015)
Ali Dadashi, Omid Mirmotahari, Yngvar Berg
An ultra-low-voltage, semi-floating-gate, domino, dual-rail, NOR gate. ICECS (2015)
Mehdi Azadmehr, Belal K. Khajeh, Yngvar Berg
An ultra-low voltage tunable dual-Band Pass Filter. SSD (2014)
Yngvar Berg
Ultra Low-Voltage and High-Speed CMOS Full Adder Using Floating-Gates and Multiple-Valued Logic. ISMVL (2011)
Yngvar Berg
Novel high speed and ultra low voltage CMOS flip-flops. ICECS (2010)
Yngvar Berg, Mehdi Azadmehr
Reconfigurable pseudo floating-gate analog circuits. ICECS (2010)
Yngvar Berg
Ultra low voltage and high speed CMOS flip-flop using floating-gates. VLSI-SoC (2010)
Yngvar Berg
Static ultra-low-voltage high-speed CMOS logic and latches. VLSI-SoC (2010)
Yngvar Berg
Novel ultra low voltage transconductance amplifier. ISCAS (2010)
Yngvar Berg
Ultra low-voltage bidirectional current mirror using clocked semi-floating-gate transistors. DDECS (2010)
Yngvar Berg
Low Voltage Semi Floating-Gate Binary to Multiple-Value and Multiple-Value to Binary Converters. ISMVL (2010)
Yngvar Berg
Ultra low voltage static carry generate circuit. ISCAS (2010)
Yngvar Berg
Novel ultra low-voltage and high speed domino CMOS logic. VLSI-SoC (2010)
Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Yngvar Berg, Tuan Vu Cao
New SRAM design using body bias technique for ultra low power applications. ISQED (2010)
Yngvar Berg
Novel high speed and ultra low voltage CMOS flip-flop. ICECS (2009)
Yngvar Berg, Omid Mirmotahari
Clocked semi-floating-gate ultra low-voltage inverting current mirror. SoCC (2009)
Yngvar Berg, Omid Mirmotahari
Clocked semi-floating-gate ultra low-voltage current multiplier. ECCTD (2009)
Yngvar Berg, Omid Mirmotahari
Clocked semi-floating-gate ultra low-voltage symmetric and bidirectional current mirror. SoCC (2009)
Yngvar Berg
Ultra low voltage semi-floating-gate transconductance amplifier based on binary inverters. ICECS (2009)
Yngvar Berg, Omid Mirmotahari
Ultra low-voltage switched current mirror. DDECS (2009)
Yngvar Berg, Omid Mirmotahari
Ultra low voltage and high speed CMOS carry generate circuits. ECCTD (2009)
Yngvar Berg, Omid Mirmotahari
Clocked semi-floating-gate pseudo differential pair for low-voltage analog design. ECCTD (2009)
Yngvar Berg, Omid Mirmotahari
Low voltage precharge CMOS logic. DDECS (2009)
Mehdi Azadmehr, Yngvar Berg
Cascade of Current-Starved Pseudo Floating-Gate inverters. ICECS (2008)
Yngvar Berg, Omid Mirmotahari, Snorre Aunet
Clocked semi-floating-gate ultra low-voltage current mirror. ICECS (2008)
Omid Mirmotahari, Yngvar Berg
Low Voltage Design against Power Analysis Attacks. DELTA (2008)
Snorre Aunet, Bengt Oelmann, Per Andreas Norseng, Yngvar Berg
Real-Time Reconfigurable Subthreshold CMOS Perceptron. IEEE Trans. Neural Networks 19 (4) (2008)
Omid Mirmotahari, Yngvar Berg
Proposal for a Bidirectional Gate Using Pseudo Floating-Gate. DELTA (2008)
Mehdi Azadmehr, Yngvar Berg, Omid Mirmotahari
Bi-directional Current-Starved Pseudo Floating-Gate differentiator / integrator. ICECS (2008)
Omid Mirmotahari, Yngvar Berg
Ultra Low Voltage High Speed Differential CMOS Inverter. PATMOS (2008)
Yngvar Berg, Omid Mirmotahari, Snorre Aunet
Ultra low voltage and, nor and XOR CMOS gates. ICECS (2008)
Yngvar Berg, Omid Mirmotahari, Johannes Goplen Lomsdalen, Snorre Aunet
High Speed Ultra Low Voltage CMOS inverter. ISVLSI (2008)
Yngvar Berg, Omid Mirmotahari, Snorre Aunet
High speed and ultra low voltage CMOS latch. ICECS (2008)
Yngvar Berg, Renè Jensen, Johannes Goplen Lomsdalen, Henning Gundersen, Snorre Aunet
Fault Tolerant CMOS Logic Using Ternary Gates. ISMVL (2007)
Renè Jensen, Yngvar Berg
Dual Data-Rate Cyclic D/A Converter Using Semi Floating-Gate Devices. ISMVL (2007)
Yngvar Berg, Mehdi Azadmehr, Omid Mirmotahari, Snorre Aunet
Band Pass Pseudo Floating-Gate Amplifier. ICECS (2007)
Henning Gundersen, Yngvar Berg
Fast Addition Using Balanced Ternary Counters Designed with CMOS Semi-Floating Gate Devices. ISMVL (2007)
Yngvar Berg, Omid Mirmotahari, Per Andreas Norseng, Snorre Aunet
Ultra low voltage CMOS gates. ICECS (2006)
Henning Gundersen, Yngvar Berg
A novel ternary more, less and equality circuit using recharged semi-floating gate devices. ISCAS (2006)
Øivind Næss, Yngvar Berg
Switched pseudo floating-gate reconfigurable linear threshold elements. ISCAS (2006)
Henning Gundersen, Yngvar Berg
A Novel Balanced Ternary Adder Using Recharged Semi-Floating Gate Devices. ISMVL (2006)
Johannes Goplen Lomsdalen, Renè Jensen, Yngvar Berg
Self-refreshing Multiple Valued Memory. DDECS (2006)
Yngvar Berg, Omid Mirmotahari, Snorre Aunet
Pseudo Floating-Gate Inverter with Feedback Control. VLSI-SoC (2006)
Johannes Goplen Lomsdalen, Renè Jensen, Yngvar Berg
Multiple Valued Counter. DDECS (2006)
Henning Gundersen, Renè Jensen, Yngvar Berg
A Novel Ternary Switching Element Using CMOS Recharge Semi Floating-Gate Devices. ISMVL (2005)
Henning Gundersen, Yngvar Berg
Max and min functions using Multiple-Valued Recharged Semi-Floating Gate circuits. ISCAS (2) (2004)
Yngvar Berg, Snorre Aunet, Øivind Næss, Omid Mirmotahari
Basic Multiple-Valued Functions Using Recharge CMOS Logic. ISMVL (2004)
Omid Mirmotahari, Yngvar Berg
A Systolic Parallel Multiplier over GF(3m) Using Neuron-MOS DLC. ISMVL (2004)
Omid Mirmotahari, Yngvar Berg
A Novel D-Latch in Multiple-Valued Semi-Floating-Gate Recharged Logic. ISMVL (2004)
Snorre Aunet, Yngvar Berg, Trond Sæther
Erratum to "real-time reconfigurable linear threshold elements implemented in floating-gate CMOS". IEEE Trans. Neural Networks 14 (6) (2003)
Øivind Næss, Espen A. Olsen, Yngvar Berg, Tor Sverre Lande
A low voltage second order biquad using pseudo floating-gate transistors. ISCAS (1) (2003)
Yngvar Berg, Snorre Aunet, Øivind Næss, Johannes Goplen Lomsdalen, Mats Høvin
Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers. ISCAS (1) (2003)
Yngvar Berg, Snorre Aunet, Omid Mirmotahari, Mats Høvin
Novel recharge semi-floating-gate CMOS logic for multiple-valued systems. ISCAS (5) (2003)
Snorre Aunet, Yngvar Berg, Trond Sæther
Real-time reconfigurable linear threshold elements implemented in floating-gate CMOS. IEEE Trans. Neural Networks 14 (5) (2003)
Omid Mirmotahari, Yngvar Berg
A Novel Multiple-Input Multiple-Valued Semi-Floating-Gate LATC. ISMVL (2003)
Snorre Aunet, Yngvar Berg
UV-programmable Floating-Gate CMOS Linear Threshold Element "P1N3". IWANN (2) (2003)
Mats Høvin, Dag T. Wisland, Yngvar Berg, Tor Sverre Lande
decimator implemented by a new circuit technique using floating-gate MOS transistors. ISCAS (5) (2002)
Øivind Næss, Yngvar Berg
Tunable floating-gate low-voltage transconductor. ISCAS (4) (2002)
Yngvar Berg, Øivind Næss, Snorre Aunet, Mats Høvin
A novel floating-gate multiple-valued signal to binary signal converter. ICECS (2002)
Yngvar Berg, Øivind Næss, Snorre Aunet, Johannes Goplen Lomsdalen, Mats Høvin
A novel floating-gate binary signal to multiple-valued signal converter for multiple-valued CMOS logic. ICECS (2002)
Johannes Goplen Lomsdalen, Yngvar Berg, Renè Jensen
A low-voltage floating-gate CMOS transconductance amplifier, and a spin-off quasi frequency tripler. ISCAS (5) (2002)
Yngvar Berg, Øivind Næss, Snorre Aunet, Renè Jensen, Mats Høvin
Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic. ISCAS (5) (2002)
Yngvar Berg, Snorre Aunet, Øivind Næss, O. Hagen, Mats Høvin
A novel floating-gate multiple-valued CMOS full-adder. ISCAS (1) (2002)
Mats Høvin, Dag T. Wisland, Yngvar Berg, Jan-Tore Marienborg, Tor Sverre Lande
Delta-sigma modulation in single neurons. ISCAS (5) (2002)
Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin
A novel low-voltage floating-gate CMOS transconductance amplifier with sinh (tanh) shaped output current. ICECS (2001)
Snorre Aunet, Yngvar Berg, Trond Ytterdal, Øivind Næss, Trond Sæther
A method for simulation of floating-gate UV-programmable circuits with application to three new 2-MOSFET digital circuits. ICECS (2001)
Snorre Aunet, Yngvar Berg, Øivind Næss, Trond Sæther
Novel reconfigurable two-MOSFET UV-programmable floating-gate circuits for CARRY, NAND, NOR or INVERT functions. ICECS (2001)
Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin
Floating-gate CMOS differential analog inverter for ultra low-voltage applications. ISCAS (1) (2001)
Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin
Extreme low-voltage floating-gate CMOS transconductance amplifier. ISCAS (1) (2001)
Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin
Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion. ISCAS (4) (2001)
Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin
A 0.3 V floating-gate differential amplifier input stage with tunable gain. ICECS (2001)

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Publication Activity (10 Years)

Top Topics

Top Venues

Yngvar Berg