Fault Tolerant CMOS Logic Using Ternary Gates.
Yngvar BergRenè JensenJohannes Goplen LomsdalenHenning GundersenSnorre AunetPublished in: ISMVL (2007)
Keyphrases
- fault tolerant
- state machine
- logic circuits
- fault tolerance
- low power
- delay insensitive
- distributed systems
- power consumption
- high speed
- load balancing
- chip design
- logic programming
- modal logic
- low cost
- random access memory
- high availability
- power supply
- artificial intelligence
- floating gate
- analog vlsi
- asynchronous circuits
- cmos technology
- error correction
- sensor networks
- multimedia